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347 lines
8.7 KiB
347 lines
8.7 KiB
/* |
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* Core driver access RC5T583 power management chip. |
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* |
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* Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved. |
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* Author: Laxman dewangan <ldewangan@nvidia.com> |
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* |
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* Based on code |
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* Copyright (C) 2011 RICOH COMPANY,LTD |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms and conditions of the GNU General Public License, |
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* version 2, as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <http://www.gnu.org/licenses/>. |
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* |
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*/ |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/err.h> |
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#include <linux/slab.h> |
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#include <linux/i2c.h> |
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#include <linux/mfd/core.h> |
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#include <linux/mfd/rc5t583.h> |
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#include <linux/regmap.h> |
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#define RICOH_ONOFFSEL_REG 0x10 |
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#define RICOH_SWCTL_REG 0x5E |
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struct deepsleep_control_data { |
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u8 reg_add; |
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u8 ds_pos_bit; |
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}; |
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#define DEEPSLEEP_INIT(_id, _reg, _pos) \ |
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{ \ |
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.reg_add = RC5T583_##_reg, \ |
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.ds_pos_bit = _pos, \ |
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} |
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static struct deepsleep_control_data deepsleep_data[] = { |
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DEEPSLEEP_INIT(DC0, SLPSEQ1, 0), |
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DEEPSLEEP_INIT(DC1, SLPSEQ1, 4), |
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DEEPSLEEP_INIT(DC2, SLPSEQ2, 0), |
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DEEPSLEEP_INIT(DC3, SLPSEQ2, 4), |
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DEEPSLEEP_INIT(LDO0, SLPSEQ3, 0), |
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DEEPSLEEP_INIT(LDO1, SLPSEQ3, 4), |
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DEEPSLEEP_INIT(LDO2, SLPSEQ4, 0), |
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DEEPSLEEP_INIT(LDO3, SLPSEQ4, 4), |
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DEEPSLEEP_INIT(LDO4, SLPSEQ5, 0), |
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DEEPSLEEP_INIT(LDO5, SLPSEQ5, 4), |
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DEEPSLEEP_INIT(LDO6, SLPSEQ6, 0), |
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DEEPSLEEP_INIT(LDO7, SLPSEQ6, 4), |
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DEEPSLEEP_INIT(LDO8, SLPSEQ7, 0), |
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DEEPSLEEP_INIT(LDO9, SLPSEQ7, 4), |
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DEEPSLEEP_INIT(PSO0, SLPSEQ8, 0), |
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DEEPSLEEP_INIT(PSO1, SLPSEQ8, 4), |
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DEEPSLEEP_INIT(PSO2, SLPSEQ9, 0), |
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DEEPSLEEP_INIT(PSO3, SLPSEQ9, 4), |
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DEEPSLEEP_INIT(PSO4, SLPSEQ10, 0), |
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DEEPSLEEP_INIT(PSO5, SLPSEQ10, 4), |
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DEEPSLEEP_INIT(PSO6, SLPSEQ11, 0), |
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DEEPSLEEP_INIT(PSO7, SLPSEQ11, 4), |
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}; |
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#define EXT_PWR_REQ \ |
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(RC5T583_EXT_PWRREQ1_CONTROL | RC5T583_EXT_PWRREQ2_CONTROL) |
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static const struct mfd_cell rc5t583_subdevs[] = { |
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{.name = "rc5t583-gpio",}, |
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{.name = "rc5t583-regulator",}, |
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{.name = "rc5t583-rtc", }, |
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{.name = "rc5t583-key", } |
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}; |
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static int __rc5t583_set_ext_pwrreq1_control(struct device *dev, |
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int id, int ext_pwr, int slots) |
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{ |
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int ret; |
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uint8_t sleepseq_val = 0; |
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unsigned int en_bit; |
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unsigned int slot_bit; |
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if (id == RC5T583_DS_DC0) { |
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dev_err(dev, "PWRREQ1 is invalid control for rail %d\n", id); |
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return -EINVAL; |
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} |
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en_bit = deepsleep_data[id].ds_pos_bit; |
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slot_bit = en_bit + 1; |
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ret = rc5t583_read(dev, deepsleep_data[id].reg_add, &sleepseq_val); |
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if (ret < 0) { |
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dev_err(dev, "Error in reading reg 0x%x\n", |
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deepsleep_data[id].reg_add); |
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return ret; |
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} |
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sleepseq_val &= ~(0xF << en_bit); |
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sleepseq_val |= BIT(en_bit); |
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sleepseq_val |= ((slots & 0x7) << slot_bit); |
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ret = rc5t583_set_bits(dev, RICOH_ONOFFSEL_REG, BIT(1)); |
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if (ret < 0) { |
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dev_err(dev, "Error in updating the 0x%02x register\n", |
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RICOH_ONOFFSEL_REG); |
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return ret; |
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} |
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ret = rc5t583_write(dev, deepsleep_data[id].reg_add, sleepseq_val); |
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if (ret < 0) { |
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dev_err(dev, "Error in writing reg 0x%x\n", |
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deepsleep_data[id].reg_add); |
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return ret; |
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} |
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if (id == RC5T583_DS_LDO4) { |
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ret = rc5t583_write(dev, RICOH_SWCTL_REG, 0x1); |
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if (ret < 0) |
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dev_err(dev, "Error in writing reg 0x%x\n", |
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RICOH_SWCTL_REG); |
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} |
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return ret; |
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} |
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static int __rc5t583_set_ext_pwrreq2_control(struct device *dev, |
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int id, int ext_pwr) |
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{ |
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int ret; |
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if (id != RC5T583_DS_DC0) { |
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dev_err(dev, "PWRREQ2 is invalid control for rail %d\n", id); |
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return -EINVAL; |
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} |
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ret = rc5t583_set_bits(dev, RICOH_ONOFFSEL_REG, BIT(2)); |
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if (ret < 0) |
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dev_err(dev, "Error in updating the ONOFFSEL 0x10 register\n"); |
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return ret; |
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} |
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int rc5t583_ext_power_req_config(struct device *dev, int ds_id, |
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int ext_pwr_req, int deepsleep_slot_nr) |
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{ |
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if ((ext_pwr_req & EXT_PWR_REQ) == EXT_PWR_REQ) |
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return -EINVAL; |
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if (ext_pwr_req & RC5T583_EXT_PWRREQ1_CONTROL) |
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return __rc5t583_set_ext_pwrreq1_control(dev, ds_id, |
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ext_pwr_req, deepsleep_slot_nr); |
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if (ext_pwr_req & RC5T583_EXT_PWRREQ2_CONTROL) |
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return __rc5t583_set_ext_pwrreq2_control(dev, |
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ds_id, ext_pwr_req); |
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return 0; |
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} |
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EXPORT_SYMBOL(rc5t583_ext_power_req_config); |
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static int rc5t583_clear_ext_power_req(struct rc5t583 *rc5t583, |
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struct rc5t583_platform_data *pdata) |
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{ |
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int ret; |
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int i; |
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uint8_t on_off_val = 0; |
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/* Clear ONOFFSEL register */ |
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if (pdata->enable_shutdown) |
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on_off_val = 0x1; |
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ret = rc5t583_write(rc5t583->dev, RICOH_ONOFFSEL_REG, on_off_val); |
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if (ret < 0) |
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dev_warn(rc5t583->dev, "Error in writing reg %d error: %d\n", |
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RICOH_ONOFFSEL_REG, ret); |
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ret = rc5t583_write(rc5t583->dev, RICOH_SWCTL_REG, 0x0); |
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if (ret < 0) |
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dev_warn(rc5t583->dev, "Error in writing reg %d error: %d\n", |
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RICOH_SWCTL_REG, ret); |
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/* Clear sleep sequence register */ |
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for (i = RC5T583_SLPSEQ1; i <= RC5T583_SLPSEQ11; ++i) { |
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ret = rc5t583_write(rc5t583->dev, i, 0x0); |
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if (ret < 0) |
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dev_warn(rc5t583->dev, |
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"Error in writing reg 0x%02x error: %d\n", |
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i, ret); |
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} |
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return 0; |
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} |
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static bool volatile_reg(struct device *dev, unsigned int reg) |
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{ |
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/* Enable caching in interrupt registers */ |
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switch (reg) { |
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case RC5T583_INT_EN_SYS1: |
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case RC5T583_INT_EN_SYS2: |
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case RC5T583_INT_EN_DCDC: |
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case RC5T583_INT_EN_RTC: |
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case RC5T583_INT_EN_ADC1: |
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case RC5T583_INT_EN_ADC2: |
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case RC5T583_INT_EN_ADC3: |
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case RC5T583_GPIO_GPEDGE1: |
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case RC5T583_GPIO_GPEDGE2: |
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case RC5T583_GPIO_EN_INT: |
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return false; |
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case RC5T583_GPIO_MON_IOIN: |
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/* This is gpio input register */ |
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return true; |
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default: |
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/* Enable caching in gpio registers */ |
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if ((reg >= RC5T583_GPIO_IOSEL) && |
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(reg <= RC5T583_GPIO_GPOFUNC)) |
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return false; |
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/* Enable caching in sleep seq registers */ |
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if ((reg >= RC5T583_SLPSEQ1) && (reg <= RC5T583_SLPSEQ11)) |
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return false; |
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/* Enable caching of regulator registers */ |
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if ((reg >= RC5T583_REG_DC0CTL) && (reg <= RC5T583_REG_SR3CTL)) |
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return false; |
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if ((reg >= RC5T583_REG_LDOEN1) && |
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(reg <= RC5T583_REG_LDO9DAC_DS)) |
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return false; |
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break; |
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} |
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return true; |
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} |
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static const struct regmap_config rc5t583_regmap_config = { |
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.reg_bits = 8, |
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.val_bits = 8, |
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.volatile_reg = volatile_reg, |
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.max_register = RC5T583_MAX_REGS, |
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.num_reg_defaults_raw = RC5T583_MAX_REGS, |
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.cache_type = REGCACHE_RBTREE, |
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}; |
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static int rc5t583_i2c_probe(struct i2c_client *i2c, |
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const struct i2c_device_id *id) |
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{ |
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struct rc5t583 *rc5t583; |
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struct rc5t583_platform_data *pdata = dev_get_platdata(&i2c->dev); |
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int ret; |
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bool irq_init_success = false; |
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if (!pdata) { |
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dev_err(&i2c->dev, "Err: Platform data not found\n"); |
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return -EINVAL; |
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} |
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rc5t583 = devm_kzalloc(&i2c->dev, sizeof(struct rc5t583), GFP_KERNEL); |
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if (!rc5t583) { |
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dev_err(&i2c->dev, "Memory allocation failed\n"); |
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return -ENOMEM; |
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} |
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rc5t583->dev = &i2c->dev; |
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i2c_set_clientdata(i2c, rc5t583); |
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rc5t583->regmap = devm_regmap_init_i2c(i2c, &rc5t583_regmap_config); |
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if (IS_ERR(rc5t583->regmap)) { |
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ret = PTR_ERR(rc5t583->regmap); |
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dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret); |
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return ret; |
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} |
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ret = rc5t583_clear_ext_power_req(rc5t583, pdata); |
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if (ret < 0) |
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return ret; |
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if (i2c->irq) { |
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ret = rc5t583_irq_init(rc5t583, i2c->irq, pdata->irq_base); |
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/* Still continue with warning, if irq init fails */ |
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if (ret) |
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dev_warn(&i2c->dev, "IRQ init failed: %d\n", ret); |
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else |
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irq_init_success = true; |
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} |
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ret = mfd_add_devices(rc5t583->dev, -1, rc5t583_subdevs, |
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ARRAY_SIZE(rc5t583_subdevs), NULL, 0, NULL); |
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if (ret) { |
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dev_err(&i2c->dev, "add mfd devices failed: %d\n", ret); |
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goto err_add_devs; |
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} |
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return 0; |
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err_add_devs: |
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if (irq_init_success) |
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rc5t583_irq_exit(rc5t583); |
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return ret; |
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} |
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static int rc5t583_i2c_remove(struct i2c_client *i2c) |
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{ |
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struct rc5t583 *rc5t583 = i2c_get_clientdata(i2c); |
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mfd_remove_devices(rc5t583->dev); |
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rc5t583_irq_exit(rc5t583); |
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return 0; |
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} |
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static const struct i2c_device_id rc5t583_i2c_id[] = { |
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{.name = "rc5t583", .driver_data = 0}, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(i2c, rc5t583_i2c_id); |
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static struct i2c_driver rc5t583_i2c_driver = { |
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.driver = { |
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.name = "rc5t583", |
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.owner = THIS_MODULE, |
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}, |
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.probe = rc5t583_i2c_probe, |
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.remove = rc5t583_i2c_remove, |
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.id_table = rc5t583_i2c_id, |
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}; |
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static int __init rc5t583_i2c_init(void) |
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{ |
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return i2c_add_driver(&rc5t583_i2c_driver); |
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} |
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subsys_initcall(rc5t583_i2c_init); |
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static void __exit rc5t583_i2c_exit(void) |
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{ |
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i2c_del_driver(&rc5t583_i2c_driver); |
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} |
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module_exit(rc5t583_i2c_exit); |
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MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); |
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MODULE_DESCRIPTION("RICOH RC5T583 power management system device driver"); |
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MODULE_LICENSE("GPL v2");
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