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45 lines
1.4 KiB
45 lines
1.4 KiB
/* |
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* Copyright(C) 2015 Linaro Limited. All rights reserved. |
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published by |
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* the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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* |
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* You should have received a copy of the GNU General Public License along with |
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* this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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#ifndef _LINUX_CORESIGHT_PMU_H |
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#define _LINUX_CORESIGHT_PMU_H |
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#define CORESIGHT_ETM_PMU_NAME "cs_etm" |
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#define CORESIGHT_ETM_PMU_SEED 0x10 |
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/* ETMv3.5/PTM's ETMCR config bit */ |
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#define ETM_OPT_CYCACC 12 |
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#define ETM_OPT_TS 28 |
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#define ETM_OPT_RETSTK 29 |
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/* ETMv4 CONFIGR programming bits for the ETM OPTs */ |
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#define ETM4_CFG_BIT_CYCACC 4 |
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#define ETM4_CFG_BIT_TS 11 |
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#define ETM4_CFG_BIT_RETSTK 12 |
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static inline int coresight_get_trace_id(int cpu) |
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{ |
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/* |
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* A trace ID of value 0 is invalid, so let's start at some |
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* random value that fits in 7 bits and go from there. Since |
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* the common convention is to have data trace IDs be I(N) + 1, |
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* set instruction trace IDs as a function of the CPU number. |
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*/ |
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return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); |
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} |
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#endif
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