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28 lines
767 B
28 lines
767 B
/* |
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* Copyright (C) 2013 NVIDIA Corporation |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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#ifndef TEGRA_GR2D_H |
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#define TEGRA_GR2D_H |
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#define GR2D_UA_BASE_ADDR 0x1a |
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#define GR2D_VA_BASE_ADDR 0x1b |
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#define GR2D_PAT_BASE_ADDR 0x26 |
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#define GR2D_DSTA_BASE_ADDR 0x2b |
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#define GR2D_DSTB_BASE_ADDR 0x2c |
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#define GR2D_DSTC_BASE_ADDR 0x2d |
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#define GR2D_SRCA_BASE_ADDR 0x31 |
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#define GR2D_SRCB_BASE_ADDR 0x32 |
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#define GR2D_SRC_BASE_ADDR_SB 0x48 |
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#define GR2D_DSTA_BASE_ADDR_SB 0x49 |
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#define GR2D_DSTB_BASE_ADDR_SB 0x4a |
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#define GR2D_UA_BASE_ADDR_SB 0x4b |
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#define GR2D_VA_BASE_ADDR_SB 0x4c |
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#define GR2D_NUM_REGS 0x4d |
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#endif
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