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148 lines
4.4 KiB
148 lines
4.4 KiB
/* Copyright (C) 2004 Jean-Marc Valin */ |
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/** |
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@file fixed_arm4.h |
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@brief ARM4 fixed-point operations |
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*/ |
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/* |
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Redistribution and use in source and binary forms, with or without |
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modification, are permitted provided that the following conditions |
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are met: |
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- Redistributions of source code must retain the above copyright |
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notice, this list of conditions and the following disclaimer. |
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- Redistributions in binary form must reproduce the above copyright |
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notice, this list of conditions and the following disclaimer in the |
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documentation and/or other materials provided with the distribution. |
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- Neither the name of the Xiph.org Foundation nor the names of its |
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contributors may be used to endorse or promote products derived from |
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this software without specific prior written permission. |
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR |
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#ifndef FIXED_ARM4_H |
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#define FIXED_ARM4_H |
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#undef MULT16_32_Q14 |
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static inline spx_word32_t MULT16_32_Q14(spx_word16_t x, spx_word32_t y) { |
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int res; |
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int dummy; |
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asm ( |
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"smull %0,%1,%2,%3 \n\t" |
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"mov %0, %0, lsr #14 \n\t" |
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"add %0, %0, %1, lsl #18 \n\t" |
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: "=&r"(res), "=&r" (dummy) |
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: "r"(y),"r"((int)x)); |
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return(res); |
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} |
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#undef MULT16_32_Q15 |
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static inline spx_word32_t MULT16_32_Q15(spx_word16_t x, spx_word32_t y) { |
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int res; |
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int dummy; |
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asm ( |
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"smull %0,%1,%2,%3 \n\t" |
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"mov %0, %0, lsr #15 \n\t" |
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"add %0, %0, %1, lsl #17 \n\t" |
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: "=&r"(res), "=&r" (dummy) |
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: "r"(y),"r"((int)x)); |
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return(res); |
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} |
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#undef DIV32_16 |
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static inline short DIV32_16(int a, int b) |
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{ |
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int res=0; |
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int dead1, dead2, dead3, dead4, dead5; |
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__asm__ __volatile__ ( |
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"\teor %5, %0, %1\n" |
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"\tmovs %4, %0\n" |
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"\trsbmi %0, %0, #0 \n" |
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"\tmovs %4, %1\n" |
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"\trsbmi %1, %1, #0 \n" |
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"\tmov %4, #1\n" |
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"\tsubs %3, %0, %1, asl #14 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #14 \n" |
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"\tsubs %3, %0, %1, asl #13 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #13 \n" |
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"\tsubs %3, %0, %1, asl #12 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #12 \n" |
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"\tsubs %3, %0, %1, asl #11 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #11 \n" |
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"\tsubs %3, %0, %1, asl #10 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #10 \n" |
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"\tsubs %3, %0, %1, asl #9 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #9 \n" |
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"\tsubs %3, %0, %1, asl #8 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #8 \n" |
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"\tsubs %3, %0, %1, asl #7 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #7 \n" |
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"\tsubs %3, %0, %1, asl #6 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #6 \n" |
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"\tsubs %3, %0, %1, asl #5 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #5 \n" |
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"\tsubs %3, %0, %1, asl #4 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #4 \n" |
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"\tsubs %3, %0, %1, asl #3 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #3 \n" |
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"\tsubs %3, %0, %1, asl #2 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #2 \n" |
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"\tsubs %3, %0, %1, asl #1 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4, asl #1 \n" |
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"\tsubs %3, %0, %1 \n" |
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"\tmovpl %0, %3 \n" |
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"\torrpl %2, %2, %4 \n" |
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"\tmovs %5, %5, lsr #31 \n" |
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"\trsbne %2, %2, #0 \n" |
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: "=r" (dead1), "=r" (dead2), "=r" (res), |
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"=r" (dead3), "=r" (dead4), "=r" (dead5) |
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: "0" (a), "1" (b), "2" (res) |
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: "cc" |
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); |
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return res; |
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} |
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#endif
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