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223 lines
9.2 KiB
223 lines
9.2 KiB
#!/usr/bin/env python2.7 |
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# Copyright 2015, VIXL authors |
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# All rights reserved. |
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# |
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# Redistribution and use in source and binary forms, with or without |
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# modification, are permitted provided that the following conditions are met: |
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# |
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# * Redistributions of source code must retain the above copyright notice, |
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# this list of conditions and the following disclaimer. |
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# * Redistributions in binary form must reproduce the above copyright notice, |
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# this list of conditions and the following disclaimer in the documentation |
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# and/or other materials provided with the distribution. |
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# * Neither the name of ARM Limited nor the names of its contributors may be |
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# used to endorse or promote products derived from this software without |
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# specific prior written permission. |
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# |
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND |
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE |
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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import os |
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import sys |
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import argparse |
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import re |
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import util |
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copyright_header = """// Copyright 2015, VIXL authors |
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// All rights reserved. |
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// |
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// Redistribution and use in source and binary forms, with or without |
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// modification, are permitted provided that the following conditions are met: |
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// |
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// * Redistributions of source code must retain the above copyright notice, |
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// this list of conditions and the following disclaimer. |
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// * Redistributions in binary form must reproduce the above copyright notice, |
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// this list of conditions and the following disclaimer in the documentation |
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// and/or other materials provided with the distribution. |
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// * Neither the name of ARM Limited nor the names of its contributors may be |
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// used to endorse or promote products derived from this software without |
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// specific prior written permission. |
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// |
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND |
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE |
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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""" |
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master_trace_header = """ |
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// This file holds the expected results for the instructions tested by |
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// test-simulator-aarch64. |
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// |
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// If you update input lists in test-simulator-inputs-aarch64.h, or add a new |
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// test to test-simulator-aarch64.cc, please run |
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// tools/generate_simulator_traces.py on a reference platform to regenerate |
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// this file and trace files. |
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// |
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#ifndef VIXL_TEST_AARCH64_SIMULATOR_TRACES_AARCH64_H_ |
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#define VIXL_TEST_AARCH64_SIMULATOR_TRACES_AARCH64_H_ |
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extern "C" { |
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#include <stdint.h> |
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} |
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// To add a new simulator test to test-simulator-aarch64.cc, add dummy array(s) |
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// below to build test-simulator-aarch64 for reference platform. Then, run |
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// tools/generate_simulator_traces.py on a reference platform to regenerate this |
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// file and traces files. |
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// --------------------------------------------------------------------- |
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// ADD DUMMY ARRAYS FOR NEW SIMULATOR TEST HERE. |
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// --------------------------------------------------------------------- |
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const uint64_t kExpected_dummy_64[] = { 0 }; |
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const size_t kExpectedCount_dummy_64 = 0; |
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const uint32_t kExpected_dummy_32[] = { 0 }; |
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const size_t kExpectedCount_dummy_32 = 0; |
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// --------------------------------------------------------------------- |
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// Simulator test trace output files. |
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// --------------------------------------------------------------------- |
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""" |
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master_trace_footer = """ |
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#endif // VIXL_TEST_AARCH64_SIMULATOR_TRACES_AARCH64_H_ |
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""" |
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trace_header = """ |
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// --------------------------------------------------------------------- |
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// This file is auto generated using tools/generate_simulator_traces.py. |
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// |
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// PLEASE DO NOT EDIT. |
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// --------------------------------------------------------------------- |
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""" |
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def BuildOptions(root): |
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result = argparse.ArgumentParser(description = 'Simulator test generator.') |
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result.add_argument('--runner', action='store', |
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default=os.path.join(root, 'obj/latest/test/test-runner'), |
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help='The test executable to run.') |
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result.add_argument('--aarch32-only', action='store_true') |
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result.add_argument('--aarch64-only', action='store_true') |
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result.add_argument('--out', action='store', |
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default='test/aarch64/test-simulator-traces-aarch64.h') |
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return result.parse_args() |
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def ShouldGenerateAArch32(args): |
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return (not args.aarch32_only and not args.aarch64_only) or args.aarch32_only |
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def ShouldGenerateAArch64(args): |
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return (not args.aarch32_only and not args.aarch64_only) or args.aarch64_only |
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if __name__ == '__main__': |
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# $ROOT/tools/generate_simulator_traces.py |
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root_dir = os.path.dirname(os.path.dirname(os.path.abspath(sys.argv[0]))) |
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os.chdir(root_dir) |
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args = BuildOptions(root_dir) |
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# List all tests. |
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status, test_list = util.getstatusoutput(args.runner + ' --list') |
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if status != 0: util.abort('Failed to list all tests') |
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if ShouldGenerateAArch64(args): |
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# Run each simulator test (AARCH64_SIM_*) with the --generate_test_trace |
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# option, and use the output to create the traces header (from --out). In |
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# addition, the test-simulator-traces-aarch64.h file, the master trace file, |
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# which includes all other trace files is generated. |
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# Create master trace file. |
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master_trace_f = open(args.out, 'w') |
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master_trace_f.write(copyright_header) |
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master_trace_f.write(master_trace_header) |
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master_trace_f.write('\n\n') |
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# Find the AArch64 simulator tests. |
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tests = sorted(filter(lambda t: 'AARCH64_SIM_' in t, test_list.split())) |
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for test in tests: |
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# Run each test. |
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print 'Generating trace for ' + test; |
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# Strip out 'AARCH64_' to get the name of the test. |
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test_name = test[len('AARCH64_'):] |
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cmd = ' '.join([args.runner, '--generate_test_trace', test]) |
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status, output = util.getstatusoutput(cmd) |
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if status != 0: util.abort('Failed to run ' + cmd + '.') |
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# Create a new trace header file. |
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trace_filename = test_name.lower().replace('_', '-') + "-trace-aarch64.h" |
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trace_f = open("test/aarch64/traces/" + trace_filename, 'w') |
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trace_f.write(copyright_header) |
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trace_f.write(trace_header) |
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trace_f.write('\n') |
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trace_f.write("#ifndef VIXL_" + test_name.upper() + "_TRACE_AARCH64_H_\n") |
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trace_f.write("#define VIXL_" + test_name.upper() + "_TRACE_AARCH64_H_\n") |
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trace_f.write('\n') |
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trace_f.write(output) |
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trace_f.write('\n') |
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trace_f.write('\n' + "#endif // VIXL_" |
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+ test_name.upper() + "_TRACE_AARCH64_H_" + '\n') |
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trace_f.close() |
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# Update master trace file. |
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master_trace_f.write( |
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'#include \"aarch64/traces/' + trace_filename + '\"\n') |
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# Close master trace file. |
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master_trace_f.write(master_trace_footer) |
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master_trace_f.close() |
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if ShouldGenerateAArch32(args): |
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# Run each test (AARCH32_{SIMULATOR,ASSEMBLER}_*) with the |
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# --generate_test_trace option. |
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# Find the AArch32 tests. |
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tests = sorted(filter( |
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lambda t: 'AARCH32_SIMULATOR_' in t or 'AARCH32_ASSEMBLER_' in t, |
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test_list.split())) |
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for test in tests: |
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# Run each test. |
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print 'Generating trace for ' + test; |
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# Strip out 'AARCH32_' to get the name of the test. |
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test_name = test[len('AARCH32_'):] |
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# An "and" instruction will be called "and_" since we cannot clash with |
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# the C++ operator. Rename "and_" to "and" to keep sane filenames. |
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test_name = test_name.replace('and_', 'and') |
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cmd = ' '.join([args.runner, '--generate_test_trace', test]) |
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status, output = util.getstatusoutput(cmd) |
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if status != 0: util.abort('Failed to run ' + cmd + '.') |
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# Create a new trace header file. |
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trace_filename = test_name.lower().replace('_', '-') + ".h" |
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trace_f = open("test/aarch32/traces/" + trace_filename, 'w') |
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trace_f.write(copyright_header) |
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trace_f.write(trace_header) |
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trace_f.write('\n') |
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trace_f.write("#ifndef VIXL_" + test_name.upper() + "_H_\n") |
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trace_f.write("#define VIXL_" + test_name.upper() + "_H_\n") |
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trace_f.write('\n') |
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trace_f.write(output) |
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trace_f.write('\n') |
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trace_f.write( |
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'\n' + "#endif // VIXL_" + test_name.upper() + "_H_" + '\n') |
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trace_f.close() |
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print 'Trace generation COMPLETE'
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