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677 lines
15 KiB
677 lines
15 KiB
/* |
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* Device driver for the IIsi-style ADB on some Mac LC and II-class machines |
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* |
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* Based on via-cuda.c and via-macii.c, as well as the original |
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* adb-bus.c, which in turn is somewhat influenced by (but uses no |
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* code from) the NetBSD HWDIRECT ADB code. Original IIsi driver work |
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* was done by Robert Thompson and integrated into the old style |
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* driver by Michael Schmitz. |
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* |
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* Original sources (c) Alan Cox, Paul Mackerras, and others. |
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* |
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* Rewritten for Unified ADB by David Huggins-Daines <dhd@debian.org> |
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* |
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* 7/13/2000- extensive changes by Andrew McPherson <andrew@macduff.dhs.org> |
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* Works about 30% of the time now. |
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*/ |
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|
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#include <linux/types.h> |
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#include <linux/errno.h> |
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#include <linux/kernel.h> |
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#include <linux/adb.h> |
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#include <linux/cuda.h> |
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#include <linux/delay.h> |
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#include <linux/interrupt.h> |
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#include <asm/macintosh.h> |
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#include <asm/macints.h> |
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#include <asm/mac_via.h> |
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|
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static volatile unsigned char *via; |
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|
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/* VIA registers - spaced 0x200 bytes apart - only the ones we actually use */ |
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#define RS 0x200 /* skip between registers */ |
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#define B 0 /* B-side data */ |
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#define A RS /* A-side data */ |
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#define DIRB (2*RS) /* B-side direction (1=output) */ |
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#define DIRA (3*RS) /* A-side direction (1=output) */ |
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#define SR (10*RS) /* Shift register */ |
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#define ACR (11*RS) /* Auxiliary control register */ |
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#define IFR (13*RS) /* Interrupt flag register */ |
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#define IER (14*RS) /* Interrupt enable register */ |
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|
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/* Bits in B data register: all active low */ |
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#define TREQ 0x08 /* Transfer request (input) */ |
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#define TACK 0x10 /* Transfer acknowledge (output) */ |
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#define TIP 0x20 /* Transfer in progress (output) */ |
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#define ST_MASK 0x30 /* mask for selecting ADB state bits */ |
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|
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/* Bits in ACR */ |
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#define SR_CTRL 0x1c /* Shift register control bits */ |
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#define SR_EXT 0x0c /* Shift on external clock */ |
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#define SR_OUT 0x10 /* Shift out if 1 */ |
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|
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/* Bits in IFR and IER */ |
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#define IER_SET 0x80 /* set bits in IER */ |
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#define IER_CLR 0 /* clear bits in IER */ |
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#define SR_INT 0x04 /* Shift register full/empty */ |
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#define SR_DATA 0x08 /* Shift register data */ |
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#define SR_CLOCK 0x10 /* Shift register clock */ |
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|
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#define ADB_DELAY 150 |
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|
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#undef DEBUG_MACIISI_ADB |
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|
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static struct adb_request* current_req; |
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static struct adb_request* last_req; |
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static unsigned char maciisi_rbuf[16]; |
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static unsigned char *reply_ptr; |
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static int data_index; |
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static int reading_reply; |
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static int reply_len; |
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static int tmp; |
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static int need_sync; |
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|
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static enum maciisi_state { |
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idle, |
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sending, |
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reading, |
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} maciisi_state; |
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|
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static int maciisi_probe(void); |
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static int maciisi_init(void); |
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static int maciisi_send_request(struct adb_request* req, int sync); |
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static void maciisi_sync(struct adb_request *req); |
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static int maciisi_write(struct adb_request* req); |
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static irqreturn_t maciisi_interrupt(int irq, void* arg); |
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static void maciisi_input(unsigned char *buf, int nb); |
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static int maciisi_init_via(void); |
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static void maciisi_poll(void); |
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static int maciisi_start(void); |
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|
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struct adb_driver via_maciisi_driver = { |
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"Mac IIsi", |
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maciisi_probe, |
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maciisi_init, |
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maciisi_send_request, |
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NULL, /* maciisi_adb_autopoll, */ |
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maciisi_poll, |
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NULL /* maciisi_reset_adb_bus */ |
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}; |
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|
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static int |
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maciisi_probe(void) |
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{ |
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if (macintosh_config->adb_type != MAC_ADB_IISI) |
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return -ENODEV; |
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via = via1; |
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return 0; |
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} |
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static int |
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maciisi_init(void) |
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{ |
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int err; |
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|
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if (via == NULL) |
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return -ENODEV; |
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|
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if ((err = maciisi_init_via())) { |
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printk(KERN_ERR "maciisi_init: maciisi_init_via() failed, code %d\n", err); |
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via = NULL; |
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return err; |
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} |
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if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, 0, "ADB", |
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maciisi_interrupt)) { |
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printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB); |
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return -EAGAIN; |
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} |
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printk("adb: Mac IIsi driver v0.2 for Unified ADB.\n"); |
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return 0; |
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} |
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|
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/* Flush data from the ADB controller */ |
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static void |
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maciisi_stfu(void) |
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{ |
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int status = via[B] & (TIP|TREQ); |
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|
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if (status & TREQ) { |
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#ifdef DEBUG_MACIISI_ADB |
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printk (KERN_DEBUG "maciisi_stfu called with TREQ high!\n"); |
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#endif |
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return; |
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} |
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udelay(ADB_DELAY); |
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via[ACR] &= ~SR_OUT; |
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via[IER] = IER_CLR | SR_INT; |
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udelay(ADB_DELAY); |
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status = via[B] & (TIP|TREQ); |
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if (!(status & TREQ)) |
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{ |
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via[B] |= TIP; |
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while(1) |
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{ |
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int poll_timeout = ADB_DELAY * 5; |
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/* Poll for SR interrupt */ |
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while (!(via[IFR] & SR_INT) && poll_timeout-- > 0) |
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status = via[B] & (TIP|TREQ); |
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|
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tmp = via[SR]; /* Clear shift register */ |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_stfu: status %x timeout %d data %x\n", |
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status, poll_timeout, tmp); |
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#endif |
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if(via[B] & TREQ) |
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break; |
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|
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/* ACK on-off */ |
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via[B] |= TACK; |
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udelay(ADB_DELAY); |
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via[B] &= ~TACK; |
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} |
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|
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/* end frame */ |
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via[B] &= ~TIP; |
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udelay(ADB_DELAY); |
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} |
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via[IER] = IER_SET | SR_INT; |
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} |
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/* All specifically VIA-related initialization goes here */ |
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static int |
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maciisi_init_via(void) |
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{ |
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int i; |
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|
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/* Set the lines up. We want TREQ as input TACK|TIP as output */ |
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via[DIRB] = (via[DIRB] | TACK | TIP) & ~TREQ; |
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/* Shift register on input */ |
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via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT; |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_init_via: initial status %x\n", via[B] & (TIP|TREQ)); |
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#endif |
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/* Wipe any pending data and int */ |
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tmp = via[SR]; |
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/* Enable keyboard interrupts */ |
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via[IER] = IER_SET | SR_INT; |
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/* Set initial state: idle */ |
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via[B] &= ~(TACK|TIP); |
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/* Clear interrupt bit */ |
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via[IFR] = SR_INT; |
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for(i = 0; i < 60; i++) { |
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udelay(ADB_DELAY); |
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maciisi_stfu(); |
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udelay(ADB_DELAY); |
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if(via[B] & TREQ) |
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break; |
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} |
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if (i == 60) |
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printk(KERN_ERR "maciisi_init_via: bus jam?\n"); |
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maciisi_state = idle; |
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need_sync = 0; |
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return 0; |
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} |
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/* Send a request, possibly waiting for a reply */ |
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static int |
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maciisi_send_request(struct adb_request* req, int sync) |
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{ |
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int i; |
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|
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#ifdef DEBUG_MACIISI_ADB |
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static int dump_packet = 0; |
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#endif |
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if (via == NULL) { |
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req->complete = 1; |
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return -ENXIO; |
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} |
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#ifdef DEBUG_MACIISI_ADB |
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if (dump_packet) { |
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printk(KERN_DEBUG "maciisi_send_request:"); |
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for (i = 0; i < req->nbytes; i++) { |
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printk(" %.2x", req->data[i]); |
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} |
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printk(" sync %d\n", sync); |
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} |
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#endif |
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req->reply_expected = 1; |
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i = maciisi_write(req); |
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if (i) |
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{ |
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/* Normally, if a packet requires syncing, that happens at the end of |
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* maciisi_send_request. But if the transfer fails, it will be restarted |
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* by maciisi_interrupt(). We use need_sync to tell maciisi_interrupt |
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* when to sync a packet that it sends out. |
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* |
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* Suggestions on a better way to do this are welcome. |
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*/ |
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if(i == -EBUSY && sync) |
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need_sync = 1; |
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else |
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need_sync = 0; |
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return i; |
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} |
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if(sync) |
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maciisi_sync(req); |
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return 0; |
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} |
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/* Poll the ADB chip until the request completes */ |
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static void maciisi_sync(struct adb_request *req) |
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{ |
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int count = 0; |
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|
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_sync called\n"); |
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#endif |
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/* If for some reason the ADB chip shuts up on us, we want to avoid an endless loop. */ |
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while (!req->complete && count++ < 50) { |
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maciisi_poll(); |
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} |
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/* This could be BAD... when the ADB controller doesn't respond |
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* for this long, it's probably not coming back :-( */ |
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if (count > 50) /* Hopefully shouldn't happen */ |
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printk(KERN_ERR "maciisi_send_request: poll timed out!\n"); |
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} |
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int |
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maciisi_request(struct adb_request *req, void (*done)(struct adb_request *), |
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int nbytes, ...) |
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{ |
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va_list list; |
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int i; |
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req->nbytes = nbytes; |
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req->done = done; |
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req->reply_expected = 0; |
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va_start(list, nbytes); |
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for (i = 0; i < nbytes; i++) |
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req->data[i++] = va_arg(list, int); |
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va_end(list); |
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return maciisi_send_request(req, 1); |
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} |
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/* Enqueue a request, and run the queue if possible */ |
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static int |
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maciisi_write(struct adb_request* req) |
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{ |
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unsigned long flags; |
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int i; |
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/* We will accept CUDA packets - the VIA sends them to us, so |
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it figures that we should be able to send them to it */ |
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if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) { |
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printk(KERN_ERR "maciisi_write: packet too small or not an ADB or CUDA packet\n"); |
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req->complete = 1; |
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return -EINVAL; |
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} |
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req->next = NULL; |
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req->sent = 0; |
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req->complete = 0; |
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req->reply_len = 0; |
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local_irq_save(flags); |
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|
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if (current_req) { |
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last_req->next = req; |
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last_req = req; |
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} else { |
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current_req = req; |
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last_req = req; |
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} |
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if (maciisi_state == idle) |
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{ |
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i = maciisi_start(); |
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if(i != 0) |
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{ |
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local_irq_restore(flags); |
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return i; |
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} |
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} |
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else |
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{ |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_write: would start, but state is %d\n", maciisi_state); |
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#endif |
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local_irq_restore(flags); |
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return -EBUSY; |
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} |
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local_irq_restore(flags); |
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return 0; |
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} |
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static int |
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maciisi_start(void) |
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{ |
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struct adb_request* req; |
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int status; |
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|
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#ifdef DEBUG_MACIISI_ADB |
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status = via[B] & (TIP | TREQ); |
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|
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printk(KERN_DEBUG "maciisi_start called, state=%d, status=%x, ifr=%x\n", maciisi_state, status, via[IFR]); |
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#endif |
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if (maciisi_state != idle) { |
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/* shouldn't happen */ |
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printk(KERN_ERR "maciisi_start: maciisi_start called when driver busy!\n"); |
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return -EBUSY; |
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} |
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req = current_req; |
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if (req == NULL) |
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return -EINVAL; |
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status = via[B] & (TIP|TREQ); |
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if (!(status & TREQ)) { |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_start: bus busy - aborting\n"); |
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#endif |
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return -EBUSY; |
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} |
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/* Okay, send */ |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "maciisi_start: sending\n"); |
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#endif |
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/* Set state to active */ |
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via[B] |= TIP; |
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/* ACK off */ |
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via[B] &= ~TACK; |
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/* Delay */ |
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udelay(ADB_DELAY); |
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/* Shift out and send */ |
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via[ACR] |= SR_OUT; |
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via[SR] = req->data[0]; |
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data_index = 1; |
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/* ACK on */ |
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via[B] |= TACK; |
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maciisi_state = sending; |
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|
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return 0; |
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} |
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void |
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maciisi_poll(void) |
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{ |
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unsigned long flags; |
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|
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local_irq_save(flags); |
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if (via[IFR] & SR_INT) { |
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maciisi_interrupt(0, NULL); |
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} |
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else /* avoid calling this function too quickly in a loop */ |
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udelay(ADB_DELAY); |
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|
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local_irq_restore(flags); |
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} |
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/* Shift register interrupt - this is *supposed* to mean that the |
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register is either full or empty. In practice, I have no idea what |
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it means :( */ |
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static irqreturn_t |
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maciisi_interrupt(int irq, void* arg) |
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{ |
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int status; |
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struct adb_request *req; |
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#ifdef DEBUG_MACIISI_ADB |
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static int dump_reply = 0; |
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#endif |
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int i; |
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unsigned long flags; |
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local_irq_save(flags); |
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status = via[B] & (TIP|TREQ); |
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#ifdef DEBUG_MACIISI_ADB |
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printk(KERN_DEBUG "state %d status %x ifr %x\n", maciisi_state, status, via[IFR]); |
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#endif |
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if (!(via[IFR] & SR_INT)) { |
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/* Shouldn't happen, we hope */ |
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printk(KERN_ERR "maciisi_interrupt: called without interrupt flag set\n"); |
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local_irq_restore(flags); |
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return IRQ_NONE; |
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} |
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/* Clear the interrupt */ |
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/* via[IFR] = SR_INT; */ |
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switch_start: |
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switch (maciisi_state) { |
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case idle: |
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if (status & TIP) |
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printk(KERN_ERR "maciisi_interrupt: state is idle but TIP asserted!\n"); |
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|
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if(!reading_reply) |
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udelay(ADB_DELAY); |
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/* Shift in */ |
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via[ACR] &= ~SR_OUT; |
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/* Signal start of frame */ |
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via[B] |= TIP; |
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/* Clear the interrupt (throw this value on the floor, it's useless) */ |
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tmp = via[SR]; |
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/* ACK adb chip, high-low */ |
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via[B] |= TACK; |
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udelay(ADB_DELAY); |
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via[B] &= ~TACK; |
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reply_len = 0; |
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maciisi_state = reading; |
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if (reading_reply) { |
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reply_ptr = current_req->reply; |
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} else { |
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reply_ptr = maciisi_rbuf; |
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} |
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break; |
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|
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case sending: |
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/* via[SR]; */ |
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/* Set ACK off */ |
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via[B] &= ~TACK; |
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req = current_req; |
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|
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if (!(status & TREQ)) { |
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/* collision */ |
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printk(KERN_ERR "maciisi_interrupt: send collision\n"); |
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/* Set idle and input */ |
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via[ACR] &= ~SR_OUT; |
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tmp = via[SR]; |
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via[B] &= ~TIP; |
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/* Must re-send */ |
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reading_reply = 0; |
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reply_len = 0; |
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maciisi_state = idle; |
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udelay(ADB_DELAY); |
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/* process this now, because the IFR has been cleared */ |
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goto switch_start; |
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} |
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udelay(ADB_DELAY); |
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|
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if (data_index >= req->nbytes) { |
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/* Sent the whole packet, put the bus back in idle state */ |
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/* Shift in, we are about to read a reply (hopefully) */ |
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via[ACR] &= ~SR_OUT; |
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tmp = via[SR]; |
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/* End of frame */ |
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via[B] &= ~TIP; |
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req->sent = 1; |
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maciisi_state = idle; |
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if (req->reply_expected) { |
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/* Note: only set this once we've |
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successfully sent the packet */ |
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reading_reply = 1; |
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} else { |
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current_req = req->next; |
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if (req->done) |
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(*req->done)(req); |
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/* Do any queued requests now */ |
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i = maciisi_start(); |
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if(i == 0 && need_sync) { |
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/* Packet needs to be synced */ |
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maciisi_sync(current_req); |
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} |
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if(i != -EBUSY) |
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need_sync = 0; |
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} |
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} else { |
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/* Sending more stuff */ |
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/* Shift out */ |
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via[ACR] |= SR_OUT; |
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/* Write */ |
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via[SR] = req->data[data_index++]; |
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/* Signal 'byte ready' */ |
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via[B] |= TACK; |
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} |
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break; |
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|
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case reading: |
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/* Shift in */ |
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/* via[ACR] &= ~SR_OUT; */ /* Not in 2.2 */ |
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if (reply_len++ > 16) { |
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printk(KERN_ERR "maciisi_interrupt: reply too long, aborting read\n"); |
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via[B] |= TACK; |
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udelay(ADB_DELAY); |
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via[B] &= ~(TACK|TIP); |
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maciisi_state = idle; |
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i = maciisi_start(); |
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if(i == 0 && need_sync) { |
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/* Packet needs to be synced */ |
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maciisi_sync(current_req); |
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} |
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if(i != -EBUSY) |
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need_sync = 0; |
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break; |
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} |
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/* Read data */ |
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*reply_ptr++ = via[SR]; |
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status = via[B] & (TIP|TREQ); |
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/* ACK on/off */ |
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via[B] |= TACK; |
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udelay(ADB_DELAY); |
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via[B] &= ~TACK; |
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if (!(status & TREQ)) |
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break; /* more stuff to deal with */ |
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|
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/* end of frame */ |
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via[B] &= ~TIP; |
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tmp = via[SR]; /* That's what happens in 2.2 */ |
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udelay(ADB_DELAY); /* Give controller time to recover */ |
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|
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/* end of packet, deal with it */ |
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if (reading_reply) { |
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req = current_req; |
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req->reply_len = reply_ptr - req->reply; |
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if (req->data[0] == ADB_PACKET) { |
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/* Have to adjust the reply from ADB commands */ |
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if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) { |
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/* the 0x2 bit indicates no response */ |
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req->reply_len = 0; |
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} else { |
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/* leave just the command and result bytes in the reply */ |
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req->reply_len -= 2; |
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memmove(req->reply, req->reply + 2, req->reply_len); |
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} |
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} |
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#ifdef DEBUG_MACIISI_ADB |
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if (dump_reply) { |
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int i; |
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printk(KERN_DEBUG "maciisi_interrupt: reply is "); |
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for (i = 0; i < req->reply_len; ++i) |
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printk(" %.2x", req->reply[i]); |
|
printk("\n"); |
|
} |
|
#endif |
|
req->complete = 1; |
|
current_req = req->next; |
|
if (req->done) |
|
(*req->done)(req); |
|
/* Obviously, we got it */ |
|
reading_reply = 0; |
|
} else { |
|
maciisi_input(maciisi_rbuf, reply_ptr - maciisi_rbuf); |
|
} |
|
maciisi_state = idle; |
|
status = via[B] & (TIP|TREQ); |
|
if (!(status & TREQ)) { |
|
/* Timeout?! More likely, another packet coming in already */ |
|
#ifdef DEBUG_MACIISI_ADB |
|
printk(KERN_DEBUG "extra data after packet: status %x ifr %x\n", |
|
status, via[IFR]); |
|
#endif |
|
#if 0 |
|
udelay(ADB_DELAY); |
|
via[B] |= TIP; |
|
|
|
maciisi_state = reading; |
|
reading_reply = 0; |
|
reply_ptr = maciisi_rbuf; |
|
#else |
|
/* Process the packet now */ |
|
reading_reply = 0; |
|
goto switch_start; |
|
#endif |
|
/* We used to do this... but the controller might actually have data for us */ |
|
/* maciisi_stfu(); */ |
|
} |
|
else { |
|
/* Do any queued requests now if possible */ |
|
i = maciisi_start(); |
|
if(i == 0 && need_sync) { |
|
/* Packet needs to be synced */ |
|
maciisi_sync(current_req); |
|
} |
|
if(i != -EBUSY) |
|
need_sync = 0; |
|
} |
|
break; |
|
|
|
default: |
|
printk("maciisi_interrupt: unknown maciisi_state %d?\n", maciisi_state); |
|
} |
|
local_irq_restore(flags); |
|
return IRQ_HANDLED; |
|
} |
|
|
|
static void |
|
maciisi_input(unsigned char *buf, int nb) |
|
{ |
|
#ifdef DEBUG_MACIISI_ADB |
|
int i; |
|
#endif |
|
|
|
switch (buf[0]) { |
|
case ADB_PACKET: |
|
adb_input(buf+2, nb-2, buf[1] & 0x40); |
|
break; |
|
default: |
|
#ifdef DEBUG_MACIISI_ADB |
|
printk(KERN_DEBUG "data from IIsi ADB (%d bytes):", nb); |
|
for (i = 0; i < nb; ++i) |
|
printk(" %.2x", buf[i]); |
|
printk("\n"); |
|
#endif |
|
break; |
|
} |
|
}
|
|
|