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286 lines
7.1 KiB
286 lines
7.1 KiB
/* |
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* Public Include File for DRV6000 users |
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* (ie. NxtWave Communications - NXT6000 demodulator driver) |
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* |
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* Copyright (C) 2001 NxtWave Communications, Inc. |
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* |
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*/ |
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/* Nxt6000 Register Addresses and Bit Masks */ |
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/* Maximum Register Number */ |
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#define MAXNXT6000REG (0x9A) |
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/* 0x1B A_VIT_BER_0 aka 0x3A */ |
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#define A_VIT_BER_0 (0x1B) |
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/* 0x1D A_VIT_BER_TIMER_0 aka 0x38 */ |
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#define A_VIT_BER_TIMER_0 (0x1D) |
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/* 0x21 RS_COR_STAT */ |
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#define RS_COR_STAT (0x21) |
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#define RSCORESTATUS (0x03) |
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/* 0x22 RS_COR_INTEN */ |
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#define RS_COR_INTEN (0x22) |
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/* 0x23 RS_COR_INSTAT */ |
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#define RS_COR_INSTAT (0x23) |
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#define INSTAT_ERROR (0x04) |
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#define LOCK_LOSS_BITS (0x03) |
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/* 0x24 RS_COR_SYNC_PARAM */ |
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#define RS_COR_SYNC_PARAM (0x24) |
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#define SYNC_PARAM (0x03) |
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/* 0x25 BER_CTRL */ |
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#define BER_CTRL (0x25) |
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#define BER_ENABLE (0x02) |
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#define BER_RESET (0x01) |
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/* 0x26 BER_PAY */ |
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#define BER_PAY (0x26) |
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/* 0x27 BER_PKT_L */ |
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#define BER_PKT_L (0x27) |
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#define BER_PKTOVERFLOW (0x80) |
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/* 0x30 VIT_COR_CTL */ |
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#define VIT_COR_CTL (0x30) |
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#define BER_CONTROL (0x02) |
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#define VIT_COR_MASK (0x82) |
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#define VIT_COR_RESYNC (0x80) |
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/* 0x32 VIT_SYNC_STATUS */ |
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#define VIT_SYNC_STATUS (0x32) |
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#define VITINSYNC (0x80) |
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/* 0x33 VIT_COR_INTEN */ |
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#define VIT_COR_INTEN (0x33) |
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#define GLOBAL_ENABLE (0x80) |
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/* 0x34 VIT_COR_INTSTAT */ |
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#define VIT_COR_INTSTAT (0x34) |
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#define BER_DONE (0x08) |
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#define BER_OVERFLOW (0x10) |
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/* 0x38 VIT_BERTIME_2 */ |
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#define VIT_BERTIME_2 (0x38) |
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/* 0x39 VIT_BERTIME_1 */ |
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#define VIT_BERTIME_1 (0x39) |
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/* 0x3A VIT_BERTIME_0 */ |
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#define VIT_BERTIME_0 (0x3a) |
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/* 0x38 OFDM_BERTimer *//* Use the alias registers */ |
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#define A_VIT_BER_TIMER_0 (0x1D) |
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/* 0x3A VIT_BER_TIMER_0 *//* Use the alias registers */ |
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#define A_VIT_BER_0 (0x1B) |
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/* 0x3B VIT_BER_1 */ |
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#define VIT_BER_1 (0x3b) |
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/* 0x3C VIT_BER_0 */ |
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#define VIT_BER_0 (0x3c) |
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/* 0x40 OFDM_COR_CTL */ |
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#define OFDM_COR_CTL (0x40) |
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#define COREACT (0x20) |
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#define HOLDSM (0x10) |
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#define WAIT_AGC (0x02) |
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#define WAIT_SYR (0x03) |
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/* 0x41 OFDM_COR_STAT */ |
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#define OFDM_COR_STAT (0x41) |
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#define COR_STATUS (0x0F) |
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#define MONITOR_TPS (0x06) |
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#define TPSLOCKED (0x40) |
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#define AGCLOCKED (0x10) |
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/* 0x42 OFDM_COR_INTEN */ |
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#define OFDM_COR_INTEN (0x42) |
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#define TPSRCVBAD (0x04) |
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#define TPSRCVCHANGED (0x02) |
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#define TPSRCVUPDATE (0x01) |
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/* 0x43 OFDM_COR_INSTAT */ |
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#define OFDM_COR_INSTAT (0x43) |
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/* 0x44 OFDM_COR_MODEGUARD */ |
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#define OFDM_COR_MODEGUARD (0x44) |
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#define FORCEMODE (0x08) |
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#define FORCEMODE8K (0x04) |
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/* 0x45 OFDM_AGC_CTL */ |
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#define OFDM_AGC_CTL (0x45) |
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#define INITIAL_AGC_BW (0x08) |
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#define AGCNEG (0x02) |
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#define AGCLAST (0x10) |
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/* 0x48 OFDM_AGC_TARGET */ |
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#define OFDM_AGC_TARGET (0x48) |
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#define OFDM_AGC_TARGET_DEFAULT (0x28) |
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#define OFDM_AGC_TARGET_IMPULSE (0x38) |
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/* 0x49 OFDM_AGC_GAIN_1 */ |
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#define OFDM_AGC_GAIN_1 (0x49) |
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/* 0x4B OFDM_ITB_CTL */ |
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#define OFDM_ITB_CTL (0x4B) |
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#define ITBINV (0x01) |
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/* 0x49 AGC_GAIN_1 */ |
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#define AGC_GAIN_1 (0x49) |
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/* 0x4A AGC_GAIN_2 */ |
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#define AGC_GAIN_2 (0x4A) |
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/* 0x4C OFDM_ITB_FREQ_1 */ |
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#define OFDM_ITB_FREQ_1 (0x4C) |
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/* 0x4D OFDM_ITB_FREQ_2 */ |
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#define OFDM_ITB_FREQ_2 (0x4D) |
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/* 0x4E OFDM_CAS_CTL */ |
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#define OFDM_CAS_CTL (0x4E) |
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#define ACSDIS (0x40) |
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#define CCSEN (0x80) |
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/* 0x4F CAS_FREQ */ |
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#define CAS_FREQ (0x4F) |
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/* 0x51 OFDM_SYR_CTL */ |
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#define OFDM_SYR_CTL (0x51) |
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#define SIXTH_ENABLE (0x80) |
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#define SYR_TRACKING_DISABLE (0x01) |
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/* 0x52 OFDM_SYR_STAT */ |
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#define OFDM_SYR_STAT (0x52) |
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#define GI14_2K_SYR_LOCK (0x13) |
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#define GI14_8K_SYR_LOCK (0x17) |
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#define GI14_SYR_LOCK (0x10) |
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/* 0x55 OFDM_SYR_OFFSET_1 */ |
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#define OFDM_SYR_OFFSET_1 (0x55) |
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/* 0x56 OFDM_SYR_OFFSET_2 */ |
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#define OFDM_SYR_OFFSET_2 (0x56) |
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/* 0x58 OFDM_SCR_CTL */ |
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#define OFDM_SCR_CTL (0x58) |
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#define SYR_ADJ_DECAY_MASK (0x70) |
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#define SYR_ADJ_DECAY (0x30) |
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/* 0x59 OFDM_PPM_CTL_1 */ |
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#define OFDM_PPM_CTL_1 (0x59) |
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#define PPMMAX_MASK (0x30) |
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#define PPM256 (0x30) |
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/* 0x5B OFDM_TRL_NOMINALRATE_1 */ |
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#define OFDM_TRL_NOMINALRATE_1 (0x5B) |
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/* 0x5C OFDM_TRL_NOMINALRATE_2 */ |
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#define OFDM_TRL_NOMINALRATE_2 (0x5C) |
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/* 0x5D OFDM_TRL_TIME_1 */ |
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#define OFDM_TRL_TIME_1 (0x5D) |
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/* 0x60 OFDM_CRL_FREQ_1 */ |
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#define OFDM_CRL_FREQ_1 (0x60) |
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/* 0x63 OFDM_CHC_CTL_1 */ |
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#define OFDM_CHC_CTL_1 (0x63) |
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#define MANMEAN1 (0xF0); |
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#define CHCFIR (0x01) |
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/* 0x64 OFDM_CHC_SNR */ |
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#define OFDM_CHC_SNR (0x64) |
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/* 0x65 OFDM_BDI_CTL */ |
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#define OFDM_BDI_CTL (0x65) |
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#define LP_SELECT (0x02) |
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/* 0x67 OFDM_TPS_RCVD_1 */ |
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#define OFDM_TPS_RCVD_1 (0x67) |
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#define TPSFRAME (0x03) |
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/* 0x68 OFDM_TPS_RCVD_2 */ |
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#define OFDM_TPS_RCVD_2 (0x68) |
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/* 0x69 OFDM_TPS_RCVD_3 */ |
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#define OFDM_TPS_RCVD_3 (0x69) |
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/* 0x6A OFDM_TPS_RCVD_4 */ |
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#define OFDM_TPS_RCVD_4 (0x6A) |
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/* 0x6B OFDM_TPS_RESERVED_1 */ |
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#define OFDM_TPS_RESERVED_1 (0x6B) |
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/* 0x6C OFDM_TPS_RESERVED_2 */ |
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#define OFDM_TPS_RESERVED_2 (0x6C) |
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/* 0x73 OFDM_MSC_REV */ |
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#define OFDM_MSC_REV (0x73) |
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/* 0x76 OFDM_SNR_CARRIER_2 */ |
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#define OFDM_SNR_CARRIER_2 (0x76) |
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#define MEAN_MASK (0x80) |
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#define MEANBIT (0x80) |
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/* 0x80 ANALOG_CONTROL_0 */ |
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#define ANALOG_CONTROL_0 (0x80) |
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#define POWER_DOWN_ADC (0x40) |
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/* 0x81 ENABLE_TUNER_IIC */ |
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#define ENABLE_TUNER_IIC (0x81) |
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#define ENABLE_TUNER_BIT (0x01) |
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/* 0x82 EN_DMD_RACQ */ |
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#define EN_DMD_RACQ (0x82) |
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#define EN_DMD_RACQ_REG_VAL (0x81) |
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#define EN_DMD_RACQ_REG_VAL_14 (0x01) |
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/* 0x84 SNR_COMMAND */ |
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#define SNR_COMMAND (0x84) |
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#define SNRStat (0x80) |
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/* 0x85 SNRCARRIERNUMBER_LSB */ |
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#define SNRCARRIERNUMBER_LSB (0x85) |
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/* 0x87 SNRMINTHRESHOLD_LSB */ |
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#define SNRMINTHRESHOLD_LSB (0x87) |
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/* 0x89 SNR_PER_CARRIER_LSB */ |
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#define SNR_PER_CARRIER_LSB (0x89) |
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/* 0x8B SNRBELOWTHRESHOLD_LSB */ |
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#define SNRBELOWTHRESHOLD_LSB (0x8B) |
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/* 0x91 RF_AGC_VAL_1 */ |
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#define RF_AGC_VAL_1 (0x91) |
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/* 0x92 RF_AGC_STATUS */ |
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#define RF_AGC_STATUS (0x92) |
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/* 0x98 DIAG_CONFIG */ |
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#define DIAG_CONFIG (0x98) |
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#define DIAG_MASK (0x70) |
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#define TB_SET (0x10) |
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#define TRAN_SELECT (0x07) |
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#define SERIAL_SELECT (0x01) |
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/* 0x99 SUB_DIAG_MODE_SEL */ |
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#define SUB_DIAG_MODE_SEL (0x99) |
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#define CLKINVERSION (0x01) |
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/* 0x9A TS_FORMAT */ |
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#define TS_FORMAT (0x9A) |
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#define ERROR_SENSE (0x08) |
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#define VALID_SENSE (0x04) |
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#define SYNC_SENSE (0x02) |
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#define GATED_CLOCK (0x01) |
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#define NXT6000ASICDEVICE (0x0b)
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