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191 lines
6.1 KiB
191 lines
6.1 KiB
/* |
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* Driver for the NVIDIA Tegra pinmux |
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* |
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* Copyright (c) 2011, NVIDIA CORPORATION. All rights reserved. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms and conditions of the GNU General Public License, |
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* version 2, as published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope it will be useful, but WITHOUT |
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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* more details. |
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*/ |
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#ifndef __PINMUX_TEGRA_H__ |
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#define __PINMUX_TEGRA_H__ |
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enum tegra_pinconf_param { |
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/* argument: tegra_pinconf_pull */ |
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TEGRA_PINCONF_PARAM_PULL, |
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/* argument: tegra_pinconf_tristate */ |
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TEGRA_PINCONF_PARAM_TRISTATE, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_ENABLE_INPUT, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_OPEN_DRAIN, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_LOCK, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_IORESET, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_RCV_SEL, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_SCHMITT, |
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/* argument: Boolean */ |
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TEGRA_PINCONF_PARAM_LOW_POWER_MODE, |
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/* argument: Integer, range is HW-dependant */ |
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TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, |
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/* argument: Integer, range is HW-dependant */ |
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TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, |
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/* argument: Integer, range is HW-dependant */ |
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TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, |
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/* argument: Integer, range is HW-dependant */ |
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TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, |
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/* argument: Integer, range is HW-dependant */ |
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TEGRA_PINCONF_PARAM_DRIVE_TYPE, |
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}; |
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enum tegra_pinconf_pull { |
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TEGRA_PINCONFIG_PULL_NONE, |
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TEGRA_PINCONFIG_PULL_DOWN, |
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TEGRA_PINCONFIG_PULL_UP, |
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}; |
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enum tegra_pinconf_tristate { |
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TEGRA_PINCONFIG_DRIVEN, |
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TEGRA_PINCONFIG_TRISTATE, |
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}; |
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#define TEGRA_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_)) |
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#define TEGRA_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16) |
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#define TEGRA_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff) |
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/** |
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* struct tegra_function - Tegra pinctrl mux function |
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* @name: The name of the function, exported to pinctrl core. |
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* @groups: An array of pin groups that may select this function. |
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* @ngroups: The number of entries in @groups. |
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*/ |
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struct tegra_function { |
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const char *name; |
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const char **groups; |
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unsigned ngroups; |
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}; |
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/** |
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* struct tegra_pingroup - Tegra pin group |
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* @name The name of the pin group. |
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* @pins An array of pin IDs included in this pin group. |
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* @npins The number of entries in @pins. |
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* @funcs The mux functions which can be muxed onto this group. |
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* @mux_reg: Mux register offset. |
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* This register contains the mux, einput, odrain, lock, |
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* ioreset, rcv_sel parameters. |
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* @mux_bank: Mux register bank. |
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* @mux_bit: Mux register bit. |
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* @pupd_reg: Pull-up/down register offset. |
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* @pupd_bank: Pull-up/down register bank. |
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* @pupd_bit: Pull-up/down register bit. |
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* @tri_reg: Tri-state register offset. |
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* @tri_bank: Tri-state register bank. |
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* @tri_bit: Tri-state register bit. |
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* @einput_bit: Enable-input register bit. |
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* @odrain_bit: Open-drain register bit. |
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* @lock_bit: Lock register bit. |
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* @ioreset_bit: IO reset register bit. |
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* @rcv_sel_bit: Receiver select bit. |
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* @drv_reg: Drive fields register offset. |
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* This register contains hsm, schmitt, lpmd, drvdn, |
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* drvup, slwr, slwf, and drvtype parameters. |
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* @drv_bank: Drive fields register bank. |
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* @hsm_bit: High Speed Mode register bit. |
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* @schmitt_bit: Scmitt register bit. |
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* @lpmd_bit: Low Power Mode register bit. |
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* @drvdn_bit: Drive Down register bit. |
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* @drvdn_width: Drive Down field width. |
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* @drvup_bit: Drive Up register bit. |
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* @drvup_width: Drive Up field width. |
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* @slwr_bit: Slew Rising register bit. |
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* @slwr_width: Slew Rising field width. |
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* @slwf_bit: Slew Falling register bit. |
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* @slwf_width: Slew Falling field width. |
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* @drvtype_bit: Drive type register bit. |
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* |
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* -1 in a *_reg field means that feature is unsupported for this group. |
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* *_bank and *_reg values are irrelevant when *_reg is -1. |
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* When *_reg is valid, *_bit may be -1 to indicate an unsupported feature. |
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* |
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* A representation of a group of pins (possibly just one pin) in the Tegra |
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* pin controller. Each group allows some parameter or parameters to be |
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* configured. The most common is mux function selection. Many others exist |
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* such as pull-up/down, tri-state, etc. Tegra's pin controller is complex; |
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* certain groups may only support configuring certain parameters, hence |
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* each parameter is optional. |
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*/ |
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struct tegra_pingroup { |
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const char *name; |
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const unsigned *pins; |
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u8 npins; |
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u8 funcs[4]; |
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s16 mux_reg; |
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s16 pupd_reg; |
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s16 tri_reg; |
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s16 drv_reg; |
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u32 mux_bank:2; |
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u32 pupd_bank:2; |
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u32 tri_bank:2; |
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u32 drv_bank:2; |
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u32 mux_bit:6; |
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u32 pupd_bit:6; |
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u32 tri_bit:6; |
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u32 einput_bit:6; |
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u32 odrain_bit:6; |
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u32 lock_bit:6; |
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u32 ioreset_bit:6; |
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u32 rcv_sel_bit:6; |
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u32 hsm_bit:6; |
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u32 schmitt_bit:6; |
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u32 lpmd_bit:6; |
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u32 drvdn_bit:6; |
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u32 drvup_bit:6; |
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u32 slwr_bit:6; |
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u32 slwf_bit:6; |
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u32 drvtype_bit:6; |
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u32 drvdn_width:6; |
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u32 drvup_width:6; |
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u32 slwr_width:6; |
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u32 slwf_width:6; |
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}; |
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/** |
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* struct tegra_pinctrl_soc_data - Tegra pin controller driver configuration |
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* @ngpios: The number of GPIO pins the pin controller HW affects. |
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* @pins: An array describing all pins the pin controller affects. |
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* All pins which are also GPIOs must be listed first within the |
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* array, and be numbered identically to the GPIO controller's |
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* numbering. |
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* @npins: The numbmer of entries in @pins. |
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* @functions: An array describing all mux functions the SoC supports. |
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* @nfunctions: The numbmer of entries in @functions. |
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* @groups: An array describing all pin groups the pin SoC supports. |
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* @ngroups: The numbmer of entries in @groups. |
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*/ |
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struct tegra_pinctrl_soc_data { |
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unsigned ngpios; |
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const struct pinctrl_pin_desc *pins; |
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unsigned npins; |
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struct tegra_function *functions; |
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unsigned nfunctions; |
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const struct tegra_pingroup *groups; |
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unsigned ngroups; |
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}; |
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int tegra_pinctrl_probe(struct platform_device *pdev, |
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const struct tegra_pinctrl_soc_data *soc_data); |
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int tegra_pinctrl_remove(struct platform_device *pdev); |
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#endif
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