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364 lines
9.2 KiB
364 lines
9.2 KiB
/* |
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* Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx |
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* |
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* Copyright (c) 2000 Nils Faerber |
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* |
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* Based on rtc.c by Paul Gortmaker |
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* |
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* Original Driver by Nils Faerber <nils@kernelconcepts.de> |
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* |
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* Modifications from: |
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* CIH <cih@coventive.com> |
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* Nicolas Pitre <nico@fluxnic.net> |
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* Andrew Christian <andrew.christian@hp.com> |
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* |
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* Converted to the RTC subsystem and Driver Model |
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* by Richard Purdie <rpurdie@rpsys.net> |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version |
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* 2 of the License, or (at your option) any later version. |
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*/ |
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#include <linux/platform_device.h> |
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#include <linux/module.h> |
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#include <linux/clk.h> |
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#include <linux/rtc.h> |
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#include <linux/init.h> |
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#include <linux/fs.h> |
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#include <linux/interrupt.h> |
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#include <linux/slab.h> |
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#include <linux/string.h> |
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#include <linux/of.h> |
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#include <linux/pm.h> |
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#include <linux/bitops.h> |
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#include <linux/io.h> |
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#include <mach/hardware.h> |
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#include <mach/irqs.h> |
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#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP) |
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#include <mach/regs-rtc.h> |
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#endif |
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#define RTC_DEF_DIVIDER (32768 - 1) |
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#define RTC_DEF_TRIM 0 |
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#define RTC_FREQ 1024 |
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struct sa1100_rtc { |
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spinlock_t lock; |
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int irq_1hz; |
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int irq_alarm; |
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struct rtc_device *rtc; |
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struct clk *clk; |
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}; |
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static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev_id); |
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struct rtc_device *rtc = info->rtc; |
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unsigned int rtsr; |
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unsigned long events = 0; |
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spin_lock(&info->lock); |
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rtsr = RTSR; |
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/* clear interrupt sources */ |
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RTSR = 0; |
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/* Fix for a nasty initialization problem the in SA11xx RTSR register. |
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* See also the comments in sa1100_rtc_probe(). */ |
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if (rtsr & (RTSR_ALE | RTSR_HZE)) { |
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/* This is the original code, before there was the if test |
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* above. This code does not clear interrupts that were not |
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* enabled. */ |
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RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); |
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} else { |
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/* For some reason, it is possible to enter this routine |
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* without interruptions enabled, it has been tested with |
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* several units (Bug in SA11xx chip?). |
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* |
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* This situation leads to an infinite "loop" of interrupt |
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* routine calling and as a result the processor seems to |
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* lock on its first call to open(). */ |
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RTSR = RTSR_AL | RTSR_HZ; |
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} |
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/* clear alarm interrupt if it has occurred */ |
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if (rtsr & RTSR_AL) |
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rtsr &= ~RTSR_ALE; |
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RTSR = rtsr & (RTSR_ALE | RTSR_HZE); |
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/* update irq data & counter */ |
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if (rtsr & RTSR_AL) |
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events |= RTC_AF | RTC_IRQF; |
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if (rtsr & RTSR_HZ) |
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events |= RTC_UF | RTC_IRQF; |
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rtc_update_irq(rtc, 1, events); |
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spin_unlock(&info->lock); |
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return IRQ_HANDLED; |
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} |
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static int sa1100_rtc_open(struct device *dev) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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struct rtc_device *rtc = info->rtc; |
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int ret; |
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ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev); |
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if (ret) { |
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dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz); |
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goto fail_ui; |
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} |
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ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev); |
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if (ret) { |
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dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm); |
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goto fail_ai; |
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} |
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rtc->max_user_freq = RTC_FREQ; |
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rtc_irq_set_freq(rtc, NULL, RTC_FREQ); |
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return 0; |
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fail_ai: |
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free_irq(info->irq_1hz, dev); |
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fail_ui: |
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clk_disable_unprepare(info->clk); |
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return ret; |
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} |
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static void sa1100_rtc_release(struct device *dev) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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spin_lock_irq(&info->lock); |
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RTSR = 0; |
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spin_unlock_irq(&info->lock); |
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free_irq(info->irq_alarm, dev); |
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free_irq(info->irq_1hz, dev); |
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} |
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static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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spin_lock_irq(&info->lock); |
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if (enabled) |
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RTSR |= RTSR_ALE; |
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else |
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RTSR &= ~RTSR_ALE; |
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spin_unlock_irq(&info->lock); |
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return 0; |
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} |
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static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) |
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{ |
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rtc_time_to_tm(RCNR, tm); |
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return 0; |
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} |
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static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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{ |
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unsigned long time; |
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int ret; |
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ret = rtc_tm_to_time(tm, &time); |
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if (ret == 0) |
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RCNR = time; |
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return ret; |
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} |
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static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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u32 rtsr; |
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rtsr = RTSR; |
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alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; |
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alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; |
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return 0; |
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} |
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static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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unsigned long time; |
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int ret; |
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spin_lock_irq(&info->lock); |
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ret = rtc_tm_to_time(&alrm->time, &time); |
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if (ret != 0) |
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goto out; |
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RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL); |
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RTAR = time; |
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if (alrm->enabled) |
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RTSR |= RTSR_ALE; |
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else |
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RTSR &= ~RTSR_ALE; |
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out: |
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spin_unlock_irq(&info->lock); |
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return ret; |
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} |
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static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) |
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{ |
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seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR); |
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seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR); |
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return 0; |
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} |
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static const struct rtc_class_ops sa1100_rtc_ops = { |
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.open = sa1100_rtc_open, |
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.release = sa1100_rtc_release, |
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.read_time = sa1100_rtc_read_time, |
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.set_time = sa1100_rtc_set_time, |
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.read_alarm = sa1100_rtc_read_alarm, |
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.set_alarm = sa1100_rtc_set_alarm, |
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.proc = sa1100_rtc_proc, |
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.alarm_irq_enable = sa1100_rtc_alarm_irq_enable, |
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}; |
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static int sa1100_rtc_probe(struct platform_device *pdev) |
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{ |
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struct rtc_device *rtc; |
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struct sa1100_rtc *info; |
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int irq_1hz, irq_alarm, ret = 0; |
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irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz"); |
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irq_alarm = platform_get_irq_byname(pdev, "rtc alarm"); |
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if (irq_1hz < 0 || irq_alarm < 0) |
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return -ENODEV; |
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info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL); |
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if (!info) |
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return -ENOMEM; |
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info->clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(info->clk)) { |
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dev_err(&pdev->dev, "failed to find rtc clock source\n"); |
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return PTR_ERR(info->clk); |
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} |
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info->irq_1hz = irq_1hz; |
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info->irq_alarm = irq_alarm; |
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spin_lock_init(&info->lock); |
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platform_set_drvdata(pdev, info); |
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ret = clk_prepare_enable(info->clk); |
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if (ret) |
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return ret; |
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/* |
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* According to the manual we should be able to let RTTR be zero |
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* and then a default diviser for a 32.768KHz clock is used. |
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* Apparently this doesn't work, at least for my SA1110 rev 5. |
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* If the clock divider is uninitialized then reset it to the |
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* default value to get the 1Hz clock. |
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*/ |
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if (RTTR == 0) { |
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RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); |
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dev_warn(&pdev->dev, "warning: " |
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"initializing default clock divider/trim value\n"); |
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/* The current RTC value probably doesn't make sense either */ |
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RCNR = 0; |
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} |
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device_init_wakeup(&pdev->dev, 1); |
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rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops, |
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THIS_MODULE); |
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if (IS_ERR(rtc)) { |
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ret = PTR_ERR(rtc); |
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goto err_dev; |
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} |
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info->rtc = rtc; |
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/* Fix for a nasty initialization problem the in SA11xx RTSR register. |
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* See also the comments in sa1100_rtc_interrupt(). |
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* |
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* Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an |
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* interrupt pending, even though interrupts were never enabled. |
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* In this case, this bit it must be reset before enabling |
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* interruptions to avoid a nonexistent interrupt to occur. |
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* |
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* In principle, the same problem would apply to bit 0, although it has |
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* never been observed to happen. |
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* |
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* This issue is addressed both here and in sa1100_rtc_interrupt(). |
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* If the issue is not addressed here, in the times when the processor |
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* wakes up with the bit set there will be one spurious interrupt. |
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* |
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* The issue is also dealt with in sa1100_rtc_interrupt() to be on the |
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* safe side, once the condition that lead to this strange |
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* initialization is unknown and could in principle happen during |
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* normal processing. |
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* |
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* Notice that clearing bit 1 and 0 is accomplished by writting ONES to |
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* the corresponding bits in RTSR. */ |
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RTSR = RTSR_AL | RTSR_HZ; |
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return 0; |
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err_dev: |
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clk_disable_unprepare(info->clk); |
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return ret; |
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} |
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static int sa1100_rtc_remove(struct platform_device *pdev) |
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{ |
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struct sa1100_rtc *info = platform_get_drvdata(pdev); |
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if (info) |
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clk_disable_unprepare(info->clk); |
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return 0; |
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} |
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#ifdef CONFIG_PM_SLEEP |
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static int sa1100_rtc_suspend(struct device *dev) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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if (device_may_wakeup(dev)) |
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enable_irq_wake(info->irq_alarm); |
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return 0; |
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} |
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static int sa1100_rtc_resume(struct device *dev) |
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{ |
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struct sa1100_rtc *info = dev_get_drvdata(dev); |
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if (device_may_wakeup(dev)) |
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disable_irq_wake(info->irq_alarm); |
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return 0; |
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} |
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#endif |
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static SIMPLE_DEV_PM_OPS(sa1100_rtc_pm_ops, sa1100_rtc_suspend, |
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sa1100_rtc_resume); |
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#ifdef CONFIG_OF |
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static const struct of_device_id sa1100_rtc_dt_ids[] = { |
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{ .compatible = "mrvl,sa1100-rtc", }, |
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{ .compatible = "mrvl,mmp-rtc", }, |
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{} |
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}; |
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MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids); |
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#endif |
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static struct platform_driver sa1100_rtc_driver = { |
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.probe = sa1100_rtc_probe, |
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.remove = sa1100_rtc_remove, |
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.driver = { |
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.name = "sa1100-rtc", |
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.pm = &sa1100_rtc_pm_ops, |
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.of_match_table = of_match_ptr(sa1100_rtc_dt_ids), |
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}, |
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}; |
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module_platform_driver(sa1100_rtc_driver); |
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MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); |
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MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)"); |
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MODULE_LICENSE("GPL"); |
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MODULE_ALIAS("platform:sa1100-rtc");
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