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145 lines
3.6 KiB
145 lines
3.6 KiB
/* |
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* Driver for CPM (SCC/SMC) serial ports |
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* |
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* Copyright (C) 2004 Freescale Semiconductor, Inc. |
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* |
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* 2006 (c) MontaVista Software, Inc. |
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* Vitaly Bordug <vbordug@ru.mvista.com> |
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* |
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* This file is licensed under the terms of the GNU General Public License |
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* version 2. This program is licensed "as is" without any warranty of any |
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* kind, whether express or implied. |
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* |
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*/ |
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#ifndef CPM_UART_H |
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#define CPM_UART_H |
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#include <linux/platform_device.h> |
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#include <linux/fs_uart_pd.h> |
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#if defined(CONFIG_CPM2) |
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#include "cpm_uart_cpm2.h" |
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#elif defined(CONFIG_8xx) |
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#include "cpm_uart_cpm1.h" |
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#endif |
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#define SERIAL_CPM_MAJOR 204 |
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#define SERIAL_CPM_MINOR 46 |
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#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC) |
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#define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING) |
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#define FLAG_DISCARDING 0x00000004 /* when set, don't discard */ |
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#define FLAG_SMC 0x00000002 |
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#define FLAG_CONSOLE 0x00000001 |
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#define UART_SMC1 fsid_smc1_uart |
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#define UART_SMC2 fsid_smc2_uart |
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#define UART_SCC1 fsid_scc1_uart |
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#define UART_SCC2 fsid_scc2_uart |
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#define UART_SCC3 fsid_scc3_uart |
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#define UART_SCC4 fsid_scc4_uart |
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#define UART_NR fs_uart_nr |
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#define RX_NUM_FIFO 4 |
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#define RX_BUF_SIZE 32 |
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#define TX_NUM_FIFO 4 |
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#define TX_BUF_SIZE 32 |
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#define SCC_WAIT_CLOSING 100 |
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#define GPIO_CTS 0 |
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#define GPIO_RTS 1 |
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#define GPIO_DCD 2 |
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#define GPIO_DSR 3 |
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#define GPIO_DTR 4 |
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#define GPIO_RI 5 |
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#define NUM_GPIOS (GPIO_RI+1) |
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struct uart_cpm_port { |
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struct uart_port port; |
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u16 rx_nrfifos; |
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u16 rx_fifosize; |
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u16 tx_nrfifos; |
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u16 tx_fifosize; |
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smc_t __iomem *smcp; |
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smc_uart_t __iomem *smcup; |
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scc_t __iomem *sccp; |
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scc_uart_t __iomem *sccup; |
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cbd_t __iomem *rx_bd_base; |
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cbd_t __iomem *rx_cur; |
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cbd_t __iomem *tx_bd_base; |
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cbd_t __iomem *tx_cur; |
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unsigned char *tx_buf; |
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unsigned char *rx_buf; |
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u32 flags; |
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struct clk *clk; |
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u8 brg; |
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uint dp_addr; |
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void *mem_addr; |
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dma_addr_t dma_addr; |
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u32 mem_size; |
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/* wait on close if needed */ |
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int wait_closing; |
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/* value to combine with opcode to form cpm command */ |
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u32 command; |
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int gpios[NUM_GPIOS]; |
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}; |
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extern int cpm_uart_nr; |
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extern struct uart_cpm_port cpm_uart_ports[UART_NR]; |
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/* these are located in their respective files */ |
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void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd); |
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void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, |
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struct device_node *np); |
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void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram); |
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int cpm_uart_init_portdesc(void); |
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int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con); |
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void cpm_uart_freebuf(struct uart_cpm_port *pinfo); |
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void smc1_lineif(struct uart_cpm_port *pinfo); |
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void smc2_lineif(struct uart_cpm_port *pinfo); |
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void scc1_lineif(struct uart_cpm_port *pinfo); |
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void scc2_lineif(struct uart_cpm_port *pinfo); |
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void scc3_lineif(struct uart_cpm_port *pinfo); |
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void scc4_lineif(struct uart_cpm_port *pinfo); |
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/* |
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virtual to phys transtalion |
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*/ |
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static inline unsigned long cpu2cpm_addr(void *addr, |
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struct uart_cpm_port *pinfo) |
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{ |
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int offset; |
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u32 val = (u32)addr; |
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u32 mem = (u32)pinfo->mem_addr; |
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/* sane check */ |
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if (likely(val >= mem && val < mem + pinfo->mem_size)) { |
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offset = val - mem; |
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return pinfo->dma_addr + offset; |
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} |
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/* something nasty happened */ |
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BUG(); |
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return 0; |
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} |
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static inline void *cpm2cpu_addr(unsigned long addr, |
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struct uart_cpm_port *pinfo) |
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{ |
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int offset; |
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u32 val = addr; |
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u32 dma = (u32)pinfo->dma_addr; |
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/* sane check */ |
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if (likely(val >= dma && val < dma + pinfo->mem_size)) { |
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offset = val - dma; |
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return pinfo->mem_addr + offset; |
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} |
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/* something nasty happened */ |
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BUG(); |
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return NULL; |
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} |
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#endif /* CPM_UART_H */
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