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135 lines
4.5 KiB
135 lines
4.5 KiB
/* |
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* Copyright 2010 Tilera Corporation. All Rights Reserved. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation, version 2. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
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* NON INFRINGEMENT. See the GNU General Public License for |
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* more details. |
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*/ |
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#ifndef _ASM_TILE_MMU_CONTEXT_H |
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#define _ASM_TILE_MMU_CONTEXT_H |
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#include <linux/smp.h> |
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#include <asm/setup.h> |
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#include <asm/page.h> |
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#include <asm/pgalloc.h> |
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#include <asm/pgtable.h> |
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#include <asm/tlbflush.h> |
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#include <asm/homecache.h> |
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#include <asm-generic/mm_hooks.h> |
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static inline int |
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init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
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{ |
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return 0; |
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} |
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/* |
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* Note that arch/tile/kernel/head_NN.S and arch/tile/mm/migrate_NN.S |
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* also call hv_install_context(). |
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*/ |
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static inline void __install_page_table(pgd_t *pgdir, int asid, pgprot_t prot) |
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{ |
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/* FIXME: DIRECTIO should not always be set. FIXME. */ |
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int rc = hv_install_context(__pa(pgdir), prot, asid, |
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HV_CTX_DIRECTIO | CTX_PAGE_FLAG); |
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if (rc < 0) |
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panic("hv_install_context failed: %d", rc); |
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} |
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static inline void install_page_table(pgd_t *pgdir, int asid) |
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{ |
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pte_t *ptep = virt_to_kpte((unsigned long)pgdir); |
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__install_page_table(pgdir, asid, *ptep); |
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} |
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/* |
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* "Lazy" TLB mode is entered when we are switching to a kernel task, |
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* which borrows the mm of the previous task. The goal of this |
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* optimization is to avoid having to install a new page table. On |
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* early x86 machines (where the concept originated) you couldn't do |
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* anything short of a full page table install for invalidation, so |
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* handling a remote TLB invalidate required doing a page table |
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* re-install. Someone clearly decided that it was silly to keep |
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* doing this while in "lazy" TLB mode, so the optimization involves |
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* installing the swapper page table instead the first time one |
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* occurs, and clearing the cpu out of cpu_vm_mask, so the cpu running |
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* the kernel task doesn't need to take any more interrupts. At that |
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* point it's then necessary to explicitly reinstall it when context |
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* switching back to the original mm. |
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* |
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* On Tile, we have to do a page-table install whenever DMA is enabled, |
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* so in that case lazy mode doesn't help anyway. And more generally, |
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* we have efficient per-page TLB shootdown, and don't expect to spend |
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* that much time in kernel tasks in general, so just leaving the |
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* kernel task borrowing the old page table, but handling TLB |
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* shootdowns, is a reasonable thing to do. And importantly, this |
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* lets us use the hypervisor's internal APIs for TLB shootdown, which |
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* means we don't have to worry about having TLB shootdowns blocked |
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* when Linux is disabling interrupts; see the page migration code for |
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* an example of where it's important for TLB shootdowns to complete |
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* even when interrupts are disabled at the Linux level. |
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*/ |
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *t) |
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{ |
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#if CHIP_HAS_TILE_DMA() |
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/* |
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* We have to do an "identity" page table switch in order to |
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* clear any pending DMA interrupts. |
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*/ |
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if (current->thread.tile_dma_state.enabled) |
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install_page_table(mm->pgd, __this_cpu_read(current_asid)); |
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#endif |
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} |
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
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struct task_struct *tsk) |
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{ |
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if (likely(prev != next)) { |
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int cpu = smp_processor_id(); |
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/* Pick new ASID. */ |
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int asid = __this_cpu_read(current_asid) + 1; |
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if (asid > max_asid) { |
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asid = min_asid; |
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local_flush_tlb(); |
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} |
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__this_cpu_write(current_asid, asid); |
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/* Clear cpu from the old mm, and set it in the new one. */ |
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cpumask_clear_cpu(cpu, mm_cpumask(prev)); |
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cpumask_set_cpu(cpu, mm_cpumask(next)); |
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/* Re-load page tables */ |
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install_page_table(next->pgd, asid); |
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/* See how we should set the red/black cache info */ |
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check_mm_caching(prev, next); |
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/* |
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* Since we're changing to a new mm, we have to flush |
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* the icache in case some physical page now being mapped |
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* has subsequently been repurposed and has new code. |
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*/ |
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__flush_icache(); |
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} |
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} |
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static inline void activate_mm(struct mm_struct *prev_mm, |
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struct mm_struct *next_mm) |
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{ |
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switch_mm(prev_mm, next_mm, NULL); |
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} |
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#define destroy_context(mm) do { } while (0) |
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#define deactivate_mm(tsk, mm) do { } while (0) |
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#endif /* _ASM_TILE_MMU_CONTEXT_H */
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