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52 lines
1.8 KiB
52 lines
1.8 KiB
/* |
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* Copyright 2010 Tilera Corporation. All Rights Reserved. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation, version 2. |
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* |
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* This program is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
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* NON INFRINGEMENT. See the GNU General Public License for |
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* more details. |
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*/ |
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#ifndef _ASM_TILE_PERCPU_H |
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#define _ASM_TILE_PERCPU_H |
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register unsigned long my_cpu_offset_reg asm("tp"); |
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#ifdef CONFIG_PREEMPT |
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/* |
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* For full preemption, we can't just use the register variable |
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* directly, since we need barrier() to hazard against it, causing the |
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* compiler to reload anything computed from a previous "tp" value. |
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* But we also don't want to use volatile asm, since we'd like the |
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* compiler to be able to cache the value across multiple percpu reads. |
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* So we use a fake stack read as a hazard against barrier(). |
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* The 'U' constraint is like 'm' but disallows postincrement. |
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*/ |
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static inline unsigned long __my_cpu_offset(void) |
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{ |
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unsigned long tp; |
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register unsigned long *sp asm("sp"); |
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asm("move %0, tp" : "=r" (tp) : "U" (*sp)); |
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return tp; |
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} |
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#define __my_cpu_offset __my_cpu_offset() |
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#else |
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/* |
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* We don't need to hazard against barrier() since "tp" doesn't ever |
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* change with PREEMPT_NONE, and with PREEMPT_VOLUNTARY it only |
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* changes at function call points, at which we are already re-reading |
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* the value of "tp" due to "my_cpu_offset_reg" being a global variable. |
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*/ |
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#define __my_cpu_offset my_cpu_offset_reg |
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#endif |
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#define set_my_cpu_offset(tp) (my_cpu_offset_reg = (tp)) |
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#include <asm-generic/percpu.h> |
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#endif /* _ASM_TILE_PERCPU_H */
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