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127 lines
4.2 KiB
127 lines
4.2 KiB
# |
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# Memory devices |
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# |
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menuconfig MEMORY |
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bool "Memory Controller drivers" |
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if MEMORY |
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config ARM_PL172_MPMC |
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tristate "ARM PL172 MPMC driver" |
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depends on ARM_AMBA && OF |
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help |
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This selects the ARM PrimeCell PL172 MultiPort Memory Controller. |
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If you have an embedded system with an AMBA bus and a PL172 |
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controller, say Y or M here. |
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config ATMEL_SDRAMC |
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bool "Atmel (Multi-port DDR-)SDRAM Controller" |
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default y |
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depends on ARCH_AT91 && OF |
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help |
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This driver is for Atmel SDRAM Controller or Atmel Multi-port |
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DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs. |
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Starting with the at91sam9g45, this controller supports SDR, DDR and |
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LP-DDR memories. |
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config TI_AEMIF |
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tristate "Texas Instruments AEMIF driver" |
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depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF |
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help |
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This driver is for the AEMIF module available in Texas Instruments |
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SoCs. AEMIF stands for Asynchronous External Memory Interface and |
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is intended to provide a glue-less interface to a variety of |
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asynchronuous memory devices like ASRAM, NOR and NAND memory. A total |
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of 256M bytes of any of these memories can be accessed at a given |
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time via four chip selects with 64M byte access per chip select. |
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config TI_EMIF |
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tristate "Texas Instruments EMIF driver" |
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depends on ARCH_OMAP2PLUS |
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select DDR |
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help |
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This driver is for the EMIF module available in Texas Instruments |
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SoCs. EMIF is an SDRAM controller that, based on its revision, |
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supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. |
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This driver takes care of only LPDDR2 memories presently. The |
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functions of the driver includes re-configuring AC timing |
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parameters and other settings during frequency, voltage and |
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temperature changes |
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config OMAP_GPMC |
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bool |
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help |
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This driver is for the General Purpose Memory Controller (GPMC) |
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present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows |
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interfacing to a variety of asynchronous as well as synchronous |
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memory drives like NOR, NAND, OneNAND, SRAM. |
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config OMAP_GPMC_DEBUG |
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bool "Enable GPMC debug output and skip reset of GPMC during init" |
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depends on OMAP_GPMC |
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help |
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Enables verbose debugging mostly to decode the bootloader provided |
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timings. To preserve the bootloader provided timings, the reset |
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of GPMC is skipped during init. Enable this during development to |
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configure devices connected to the GPMC bus. |
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NOTE: In addition to matching the register setup with the bootloader |
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you also need to match the GPMC FCLK frequency used by the |
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bootloader or else the GPMC timings won't be identical with the |
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bootloader timings. |
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config MVEBU_DEVBUS |
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bool "Marvell EBU Device Bus Controller" |
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default y |
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depends on PLAT_ORION && OF |
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help |
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This driver is for the Device Bus controller available in some |
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Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and |
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Armada 370 and Armada XP. This controller allows to handle flash |
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devices such as NOR, NAND, SRAM, and FPGA. |
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config TEGRA20_MC |
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bool "Tegra20 Memory Controller(MC) driver" |
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default y |
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depends on ARCH_TEGRA_2x_SOC |
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help |
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This driver is for the Memory Controller(MC) module available |
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in Tegra20 SoCs, mainly for a address translation fault |
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analysis, especially for IOMMU/GART(Graphics Address |
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Relocation Table) module. |
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config FSL_CORENET_CF |
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tristate "Freescale CoreNet Error Reporting" |
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depends on FSL_SOC_BOOKE |
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help |
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Say Y for reporting of errors from the Freescale CoreNet |
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Coherency Fabric. Errors reported include accesses to |
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physical addresses that mapped by no local access window |
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(LAW) or an invalid LAW, as well as bad cache state that |
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represents a coherency violation. |
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config FSL_IFC |
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bool |
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depends on FSL_SOC |
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config JZ4780_NEMC |
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bool "Ingenic JZ4780 SoC NEMC driver" |
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default y |
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depends on MACH_JZ4780 |
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help |
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This driver is for the NAND/External Memory Controller (NEMC) in |
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the Ingenic JZ4780. This controller is used to handle external |
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memory devices such as NAND and SRAM. |
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config MTK_SMI |
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bool |
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depends on ARCH_MEDIATEK || COMPILE_TEST |
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help |
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This driver is for the Memory Controller module in MediaTek SoCs, |
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mainly help enable/disable iommu and control the power domain and |
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clocks for each local arbiter. |
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source "drivers/memory/tegra/Kconfig" |
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endif
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