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440 lines
14 KiB
440 lines
14 KiB
/* |
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* Copyright (c) 2014 MediaTek Inc. |
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* Author: Hongzhou.Yang <hongzhou.yang@mediatek.com> |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#ifndef __PINCTRL_MTK_COMMON_H |
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#define __PINCTRL_MTK_COMMON_H |
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#include <linux/pinctrl/pinctrl.h> |
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#include <linux/regmap.h> |
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#include <linux/pinctrl/pinconf-generic.h> |
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#define NO_EINT_SUPPORT 255 |
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#define MT_EDGE_SENSITIVE 0 |
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#define MT_LEVEL_SENSITIVE 1 |
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#define EINT_DBNC_SET_DBNC_BITS 4 |
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#define EINT_DBNC_RST_BIT (0x1 << 1) |
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#define EINT_DBNC_SET_EN (0x1 << 0) |
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#define MAX_IP_BASE 10 |
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#define MTK_PINCTRL_NOT_SUPPORT (0xffff) |
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#define MTK_PUPD_R1R0_BIT_PUPD (1 << 0) |
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#define MTK_PUPD_R1R0_BIT_R0 (1 << 1) |
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#define MTK_PUPD_R1R0_BIT_R1 (1 << 2) |
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#define MTK_PUPD_R1R0_BIT_SUPPORT (1 << 3) |
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#define MTK_PUPD_R1R0_GET_PUPD(val) (val & MTK_PUPD_R1R0_BIT_PUPD) |
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#define MTK_PUPD_R1R0_GET_PULLEN(val) ((val & (MTK_PUPD_R1R0_BIT_R0 | MTK_PUPD_R1R0_BIT_R1)) >> 1) |
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#define MTK_PUPD_R1R0_GET_SUPPORT(val) (val & MTK_PUPD_R1R0_BIT_SUPPORT) |
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#define MTK_PUPD_BIT_PD (1 << 0) |
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#define MTK_PUPD_BIT_PU (1 << 1) |
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/*#define GPIO_DEBUG*/ |
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/*#define CONFIG_PINCTRL_TEST*/ |
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/*#define GPIO_BRINGUP*/ |
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struct mtk_desc_function { |
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const char *name; |
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unsigned char muxval; |
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}; |
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struct mtk_desc_eint { |
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unsigned char eintmux; |
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unsigned char eintnum; |
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}; |
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struct mtk_desc_pin { |
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struct pinctrl_pin_desc pin; |
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#ifdef CONFIG_MTK_EINT_MULTI_TRIGGER_DESIGN |
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struct mtk_desc_eint eint; |
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#else |
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const struct mtk_desc_eint eint; |
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#endif |
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const struct mtk_desc_function *functions; |
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}; |
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#define MTK_PIN(_pin, _pad, _chip, _eint, ...) \ |
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{ \ |
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.pin = _pin, \ |
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.eint = _eint, \ |
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.functions = (struct mtk_desc_function[]){ \ |
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__VA_ARGS__, { } }, \ |
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} |
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#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \ |
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{ \ |
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.eintmux = _eintmux, \ |
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.eintnum = _eintnum, \ |
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} |
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#define MTK_FUNCTION(_val, _name) \ |
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{ \ |
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.muxval = _val, \ |
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.name = _name, \ |
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} |
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#define SET_ADDR(x, y) (x + (y->devdata->port_align)) |
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#define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1)) |
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struct mtk_pinctrl_group { |
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const char *name; |
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unsigned long config; |
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unsigned pin; |
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}; |
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/** |
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* struct mtk_drv_group_desc - Provide driving group data. |
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* @max_drv: The maximum current of this group. |
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* @min_drv: The minimum current of this group. |
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* @low_bit: The lowest bit of this group. |
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* @high_bit: The highest bit of this group. |
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* @step: The step current of this group. |
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*/ |
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struct mtk_drv_group_desc { |
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unsigned char min_drv; |
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unsigned char max_drv; |
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unsigned char low_bit; |
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unsigned char high_bit; |
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unsigned char step; |
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}; |
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#define MTK_DRV_GRP(_min, _max, _low, _high, _step) \ |
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{ \ |
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.min_drv = _min, \ |
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.max_drv = _max, \ |
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.low_bit = _low, \ |
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.high_bit = _high, \ |
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.step = _step, \ |
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} |
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/** |
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* struct mtk_pin_drv_grp - Provide each pin driving info. |
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* @pin: The pin number. |
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* @offset: The offset of driving register for this pin. |
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* @bit: The bit of driving register for this pin. |
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* @grp: The group for this pin belongs to. |
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*/ |
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struct mtk_pin_drv_grp { |
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unsigned short pin; |
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unsigned short offset; |
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unsigned char bit; |
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unsigned char grp; |
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}; |
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#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ |
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{ \ |
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.pin = _pin, \ |
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.offset = _offset, \ |
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.bit = _bit, \ |
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.grp = _grp, \ |
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} |
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/** |
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* struct mtk_pin_spec_pupd_set_samereg |
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* - For special pins' pull up/down setting which resides in same register |
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* @pin: The pin number. |
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* @offset: The offset of special pull up/down setting register. |
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* @pupd_bit: The pull up/down bit in this register. |
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* @r0_bit: The r0 bit of pull resistor. |
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* @r1_bit: The r1 bit of pull resistor. |
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*/ |
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struct mtk_pin_spec_pupd_set_samereg { |
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unsigned short pin; |
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unsigned short offset; |
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unsigned char pupd_bit; |
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unsigned char r1_bit; |
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unsigned char r0_bit; |
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}; |
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#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ |
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{ \ |
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.pin = _pin, \ |
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.offset = _offset, \ |
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.pupd_bit = _pupd, \ |
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.r1_bit = _r1, \ |
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.r0_bit = _r0, \ |
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} |
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/** |
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* struct mtk_pin_ies_set - For special pins' ies and smt setting. |
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* @start: The start pin number of those special pins. |
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* @end: The end pin number of those special pins. |
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* @offset: The offset of special setting register. |
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* @bit: The bit of special setting register. |
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*/ |
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struct mtk_pin_ies_smt_set { |
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unsigned short start; |
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unsigned short end; |
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unsigned short offset; |
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unsigned char bit; |
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}; |
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#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ |
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{ \ |
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.start = _start, \ |
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.end = _end, \ |
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.bit = _bit, \ |
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.offset = _offset, \ |
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} |
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struct mtk_eint_offsets { |
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const char *name; |
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unsigned int stat; |
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unsigned int ack; |
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unsigned int mask; |
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unsigned int mask_set; |
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unsigned int mask_clr; |
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unsigned int sens; |
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unsigned int sens_set; |
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unsigned int sens_clr; |
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unsigned int soft; |
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unsigned int soft_set; |
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unsigned int soft_clr; |
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unsigned int pol; |
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unsigned int pol_set; |
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unsigned int pol_clr; |
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unsigned int dom_en; |
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unsigned int dbnc_ctrl; |
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unsigned int dbnc_set; |
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unsigned int dbnc_clr; |
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u8 port_mask; |
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u8 ports; |
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}; |
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/** |
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* struct mt_pin_info - For all pins' setting |
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* @pin: The pin number |
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* @offset: The address offset of pin setting register |
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* @bit: The bit shift at setting register |
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* @width: The bit width at setting register |
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* @ip_num: The IOConfiguration base index |
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*/ |
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struct mtk_pin_info { |
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unsigned int pin; |
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unsigned int offset; |
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unsigned char bit; |
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unsigned char width; |
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unsigned char ip_num; |
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}; |
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#define MTK_PIN_INFO(_pin, _offset, _bit, _width, _ip_num) \ |
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{ \ |
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.pin = _pin, \ |
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.offset = _offset, \ |
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.bit = _bit, \ |
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.width = _width, \ |
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.ip_num = _ip_num,\ |
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} |
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struct mtk_pinctrl { |
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struct regmap *regmap1; |
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struct regmap *regmap2; |
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struct regmap *regmap[MAX_IP_BASE]; |
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struct pinctrl_desc pctl_desc; |
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struct device *dev; |
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struct gpio_chip *chip; |
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struct mtk_pinctrl_group *groups; |
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struct timer_list *eint_timers; |
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unsigned int ngroups; |
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const char **grp_names; |
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struct pinctrl_dev *pctl_dev; |
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const struct mtk_pinctrl_devdata *devdata; |
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void __iomem *eint_reg_base; |
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struct irq_domain *domain; |
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int *eint_dual_edges; |
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int *eint_sw_debounce_en; |
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u32 *eint_sw_debounce; |
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u32 *wake_mask; |
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u32 *cur_mask; |
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}; |
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/** |
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* struct mtk_pinctrl_devdata - Provide HW GPIO related data. |
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* @pins: An array describing all pins the pin controller affects. |
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* @npins: The number of entries in @pins. |
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* |
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* @grp_desc: The driving group info. |
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* @pin_drv_grp: The driving group for all pins. |
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* @spec_pull_set: Each SoC may have special pins for pull up/down setting, |
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* these pins' pull setting are very different, they have separate pull |
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* up/down bit, R0 and R1 resistor bit, so they need special pull setting. |
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* If special setting is success, this should return 0, otherwise it should |
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* return non-zero value. |
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* @spec_ies_smt_set: Some pins are irregular, their input enable and smt |
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* control register are discontinuous, but they are mapping together. That |
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* means when user set smt, input enable is set at the same time. So they |
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* also need special control. If special control is success, this should |
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* return 0, otherwise return non-zero value. |
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* |
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* @dir_offset: The direction register offset. |
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* @pullen_offset: The pull-up/pull-down enable register offset. |
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* @pinmux_offset: The pinmux register offset. |
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* |
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* @type1_start: Some chips have two base addresses for pull select register, |
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* that means some pins use the first address and others use the second. This |
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* member record the start of pin number to use the second address. |
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* @type1_end: The end of pin number to use the second address. |
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* |
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* @port_shf: The shift between two registers. |
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* @port_mask: The mask of register. |
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* @port_align: Provide clear register and set register step. |
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*/ |
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extern int mt_set_gpio_mode(unsigned long pin, unsigned long mode); |
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extern int mt_set_gpio_driving(unsigned long pin, unsigned long strength); |
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extern int mt_set_gpio_dir(unsigned long pin, unsigned long dir); |
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extern int mt_get_gpio_dir(unsigned long pin); |
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extern int mt_get_gpio_out(unsigned long pin); |
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extern int mt_set_gpio_out(unsigned long pin, unsigned long output); |
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extern int mt_get_gpio_in(unsigned long pin); |
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extern int mt_set_gpio_ies(unsigned long pin, unsigned long enable); |
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extern int mt_set_gpio_smt(unsigned long pin, unsigned long enable); |
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extern int mt_set_gpio_slew_rate(unsigned long pin, unsigned long enable); |
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extern int mt_set_gpio_pull_enable(unsigned long pin, unsigned long enable); |
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extern int mt_set_gpio_pull_select(unsigned long pin, unsigned long select); |
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extern int mt_set_gpio_pull_resistor(unsigned long pin, unsigned long resistors); |
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struct mtk_pinctrl_devdata { |
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#ifdef CONFIG_MTK_EINT_MULTI_TRIGGER_DESIGN |
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struct mtk_desc_pin *pins; |
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#else |
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const struct mtk_desc_pin *pins; |
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#endif |
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unsigned int npins; |
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const struct mtk_drv_group_desc *grp_desc; |
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unsigned int n_grp_cls; |
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const struct mtk_pin_drv_grp *pin_drv_grp; |
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unsigned int n_pin_drv_grps; |
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const struct mtk_pin_info *pin_mode_grps; |
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unsigned int n_pin_mode; |
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const struct mtk_pin_info *pin_ies_grps; |
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unsigned int n_pin_ies; |
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const struct mtk_pin_info *pin_smt_grps; |
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unsigned int n_pin_smt; |
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const struct mtk_pin_info *pin_pullen_grps; |
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unsigned int n_pin_pullen; |
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const struct mtk_pin_info *pin_pullsel_grps; |
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unsigned int n_pin_pullsel; |
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const struct mtk_pin_info *pin_pu_grps; |
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unsigned int n_pin_pu; |
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const struct mtk_pin_info *pin_pd_grps; |
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unsigned int n_pin_pd; |
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const struct mtk_pin_info *pin_dout_grps; |
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unsigned int n_pin_dout; |
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const struct mtk_pin_info *pin_din_grps; |
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unsigned int n_pin_din; |
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const struct mtk_pin_info *pin_dir_grps; |
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unsigned int n_pin_dir; |
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const struct mtk_pin_info *pin_pupd_r1r0_grps; |
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unsigned int n_pin_pupd_r1r0; |
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const struct mtk_pin_info *pin_pupd_grps; |
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unsigned int n_pin_pupd; |
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const struct mtk_pin_info *pin_r0_grps; |
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unsigned int n_pin_r0; |
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const struct mtk_pin_info *pin_r1_grps; |
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unsigned int n_pin_r1; |
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const struct mtk_pin_info *pin_drv_grps; |
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unsigned int n_pin_drv; |
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int (*spec_pull_set)(struct regmap *reg, unsigned int pin, |
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unsigned char align, bool isup, unsigned int arg); |
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int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin, |
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unsigned char align, int value, enum pin_config_param arg); |
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void (*spec_pinmux_set)(struct regmap *reg, unsigned int pin, |
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unsigned int mode); |
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void (*spec_dir_set)(unsigned int *reg_addr, unsigned int pin); |
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int (*spec_pull_get)(struct regmap *reg, unsigned int pin); |
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int (*spec_ies_get)(struct regmap *reg, unsigned int pin); |
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int (*spec_smt_get)(struct regmap *reg, unsigned int pin); |
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int (*spec_set_gpio_mode)(unsigned long pin, unsigned long mode); |
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int (*mt_set_gpio_dir)(unsigned long pin, unsigned long dir); |
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int (*mt_get_gpio_dir)(unsigned long pin); |
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int (*mt_get_gpio_out)(unsigned long pin); |
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int (*mt_set_gpio_out)(unsigned long pin, unsigned long output); |
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int (*mt_set_gpio_driving)(unsigned long pin, unsigned long strength); |
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int (*mt_get_gpio_in)(unsigned long pin); |
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int (*mt_set_gpio_ies)(unsigned long pin, unsigned long enable); |
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int (*mt_set_gpio_smt)(unsigned long pin, unsigned long enable); |
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int (*mt_set_gpio_slew_rate)(unsigned long pin, unsigned long enable); |
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int (*mt_set_gpio_pull_enable)(unsigned long pin, unsigned long enable); |
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int (*mt_set_gpio_pull_select)(unsigned long pin, unsigned long select); |
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int (*mt_set_gpio_pull_resistor)(unsigned long pin, unsigned long resistors); |
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int (*mtk_pctl_set_pull)(struct mtk_pinctrl *pctl, |
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int pin, bool enable, bool isup, unsigned int arg); |
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int (*mtk_pctl_get_pull)(struct mtk_pinctrl *pctl, |
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int pin, bool enable, bool isup, unsigned int arg); |
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int (*mtk_pctl_get_pull_sel)(struct mtk_pinctrl *pctl, int pin); |
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int (*mtk_pctl_get_pull_en)(struct mtk_pinctrl *pctl, int pin); |
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unsigned int (*spec_debounce_select)(unsigned debounce); |
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unsigned int dir_offset; |
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unsigned int ies_offset; |
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unsigned int smt_offset; |
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unsigned int pullen_offset; |
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unsigned int pullsel_offset; |
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unsigned int drv_offset; |
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unsigned int dout_offset; |
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unsigned int din_offset; |
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unsigned int pinmux_offset; |
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unsigned short type1_start; |
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unsigned short type1_end; |
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unsigned char port_shf; |
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unsigned char port_mask; |
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unsigned char port_align; |
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unsigned int regmap_num; |
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struct mtk_eint_offsets eint_offsets; |
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unsigned int ap_num; |
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unsigned int db_cnt; |
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struct irq_domain_ops *mtk_irq_domain_ops; |
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}; |
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int mtk_pctrl_init(struct platform_device *pdev, |
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const struct mtk_pinctrl_devdata *data, |
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struct regmap *regmap); |
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int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap, |
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const struct mtk_pin_spec_pupd_set_samereg *pupd_infos, |
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unsigned int info_num, unsigned int pin, |
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unsigned char align, bool isup, unsigned int r1r0); |
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int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap, |
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const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num, |
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unsigned int pin, unsigned char align, int value); |
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int mtk_spec_pull_get_samereg(struct regmap *regmap, |
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const struct mtk_pin_spec_pupd_set_samereg *pupd_infos, |
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unsigned int info_num, unsigned int pin); |
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int mtk_spec_get_ies_smt_range(struct regmap *regmap, |
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const struct mtk_pin_ies_smt_set *ies_smt_infos, |
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unsigned int info_num, |
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unsigned int pin); |
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int mtk_pinctrl_get_gpio_value(struct mtk_pinctrl *pctl, |
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int pin, int size, const struct mtk_pin_info pin_info[]); |
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int mtk_pinctrl_update_gpio_value(struct mtk_pinctrl *pctl, int pin, |
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unsigned char value, int size, const struct mtk_pin_info pin_info[]); |
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int mtk_pinctrl_set_gpio_value(struct mtk_pinctrl *pctl, int pin, |
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bool value, int size, const struct mtk_pin_info pin_info[]); |
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int mtk_pctrl_get_gpio_chip_base(void); |
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extern const struct dev_pm_ops mtk_eint_pm_ops; |
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unsigned int mtk_gpio_debounce_select(const unsigned int *dbnc_infos, int dbnc_infos_num, |
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unsigned int debounce); |
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extern struct mtk_pinctrl *pctl; |
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#ifdef CONFIG_MTK_EIC |
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void mt_eint_set_hw_debounce(unsigned int eint_num, unsigned int ms); |
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unsigned int mt_gpio_to_irq(unsigned gpio); |
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#endif |
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#endif /* __PINCTRL_MTK_COMMON_H */
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