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1304 lines
29 KiB
1304 lines
29 KiB
/* TILE-Gx opcode information. |
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* |
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* Copyright (C) 2011-2014 Free Software Foundation, Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
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* MA 02110-1301, USA. |
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*/ |
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#ifndef opcode_tile_h |
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#define opcode_tile_h |
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typedef unsigned long long tilegx_bundle_bits; |
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enum |
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{ |
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TILEGX_MAX_OPERANDS = 4 /* bfexts */ |
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}; |
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typedef enum |
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{ |
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TILEGX_OPC_BPT, |
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TILEGX_OPC_INFO, |
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TILEGX_OPC_INFOL, |
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TILEGX_OPC_LD4S_TLS, |
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TILEGX_OPC_LD_TLS, |
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TILEGX_OPC_MOVE, |
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TILEGX_OPC_MOVEI, |
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TILEGX_OPC_MOVELI, |
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TILEGX_OPC_PREFETCH, |
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TILEGX_OPC_PREFETCH_ADD_L1, |
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TILEGX_OPC_PREFETCH_ADD_L1_FAULT, |
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TILEGX_OPC_PREFETCH_ADD_L2, |
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TILEGX_OPC_PREFETCH_ADD_L2_FAULT, |
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TILEGX_OPC_PREFETCH_ADD_L3, |
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TILEGX_OPC_PREFETCH_ADD_L3_FAULT, |
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TILEGX_OPC_PREFETCH_L1, |
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TILEGX_OPC_PREFETCH_L1_FAULT, |
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TILEGX_OPC_PREFETCH_L2, |
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TILEGX_OPC_PREFETCH_L2_FAULT, |
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TILEGX_OPC_PREFETCH_L3, |
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TILEGX_OPC_PREFETCH_L3_FAULT, |
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TILEGX_OPC_RAISE, |
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TILEGX_OPC_ADD, |
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TILEGX_OPC_ADDI, |
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TILEGX_OPC_ADDLI, |
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TILEGX_OPC_ADDX, |
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TILEGX_OPC_ADDXI, |
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TILEGX_OPC_ADDXLI, |
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TILEGX_OPC_ADDXSC, |
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TILEGX_OPC_AND, |
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TILEGX_OPC_ANDI, |
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TILEGX_OPC_BEQZ, |
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TILEGX_OPC_BEQZT, |
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TILEGX_OPC_BFEXTS, |
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TILEGX_OPC_BFEXTU, |
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TILEGX_OPC_BFINS, |
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TILEGX_OPC_BGEZ, |
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TILEGX_OPC_BGEZT, |
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TILEGX_OPC_BGTZ, |
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TILEGX_OPC_BGTZT, |
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TILEGX_OPC_BLBC, |
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TILEGX_OPC_BLBCT, |
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TILEGX_OPC_BLBS, |
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TILEGX_OPC_BLBST, |
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TILEGX_OPC_BLEZ, |
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TILEGX_OPC_BLEZT, |
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TILEGX_OPC_BLTZ, |
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TILEGX_OPC_BLTZT, |
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TILEGX_OPC_BNEZ, |
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TILEGX_OPC_BNEZT, |
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TILEGX_OPC_CLZ, |
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TILEGX_OPC_CMOVEQZ, |
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TILEGX_OPC_CMOVNEZ, |
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TILEGX_OPC_CMPEQ, |
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TILEGX_OPC_CMPEQI, |
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TILEGX_OPC_CMPEXCH, |
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TILEGX_OPC_CMPEXCH4, |
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TILEGX_OPC_CMPLES, |
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TILEGX_OPC_CMPLEU, |
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TILEGX_OPC_CMPLTS, |
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TILEGX_OPC_CMPLTSI, |
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TILEGX_OPC_CMPLTU, |
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TILEGX_OPC_CMPLTUI, |
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TILEGX_OPC_CMPNE, |
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TILEGX_OPC_CMUL, |
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TILEGX_OPC_CMULA, |
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TILEGX_OPC_CMULAF, |
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TILEGX_OPC_CMULF, |
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TILEGX_OPC_CMULFR, |
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TILEGX_OPC_CMULH, |
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TILEGX_OPC_CMULHR, |
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TILEGX_OPC_CRC32_32, |
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TILEGX_OPC_CRC32_8, |
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TILEGX_OPC_CTZ, |
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TILEGX_OPC_DBLALIGN, |
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TILEGX_OPC_DBLALIGN2, |
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TILEGX_OPC_DBLALIGN4, |
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TILEGX_OPC_DBLALIGN6, |
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TILEGX_OPC_DRAIN, |
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TILEGX_OPC_DTLBPR, |
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TILEGX_OPC_EXCH, |
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TILEGX_OPC_EXCH4, |
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TILEGX_OPC_FDOUBLE_ADD_FLAGS, |
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TILEGX_OPC_FDOUBLE_ADDSUB, |
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TILEGX_OPC_FDOUBLE_MUL_FLAGS, |
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TILEGX_OPC_FDOUBLE_PACK1, |
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TILEGX_OPC_FDOUBLE_PACK2, |
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TILEGX_OPC_FDOUBLE_SUB_FLAGS, |
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TILEGX_OPC_FDOUBLE_UNPACK_MAX, |
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TILEGX_OPC_FDOUBLE_UNPACK_MIN, |
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TILEGX_OPC_FETCHADD, |
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TILEGX_OPC_FETCHADD4, |
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TILEGX_OPC_FETCHADDGEZ, |
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TILEGX_OPC_FETCHADDGEZ4, |
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TILEGX_OPC_FETCHAND, |
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TILEGX_OPC_FETCHAND4, |
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TILEGX_OPC_FETCHOR, |
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TILEGX_OPC_FETCHOR4, |
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TILEGX_OPC_FINV, |
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TILEGX_OPC_FLUSH, |
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TILEGX_OPC_FLUSHWB, |
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TILEGX_OPC_FNOP, |
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TILEGX_OPC_FSINGLE_ADD1, |
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TILEGX_OPC_FSINGLE_ADDSUB2, |
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TILEGX_OPC_FSINGLE_MUL1, |
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TILEGX_OPC_FSINGLE_MUL2, |
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TILEGX_OPC_FSINGLE_PACK1, |
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TILEGX_OPC_FSINGLE_PACK2, |
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TILEGX_OPC_FSINGLE_SUB1, |
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TILEGX_OPC_ICOH, |
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TILEGX_OPC_ILL, |
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TILEGX_OPC_INV, |
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TILEGX_OPC_IRET, |
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TILEGX_OPC_J, |
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TILEGX_OPC_JAL, |
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TILEGX_OPC_JALR, |
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TILEGX_OPC_JALRP, |
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TILEGX_OPC_JR, |
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TILEGX_OPC_JRP, |
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TILEGX_OPC_LD, |
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TILEGX_OPC_LD1S, |
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TILEGX_OPC_LD1S_ADD, |
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TILEGX_OPC_LD1U, |
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TILEGX_OPC_LD1U_ADD, |
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TILEGX_OPC_LD2S, |
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TILEGX_OPC_LD2S_ADD, |
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TILEGX_OPC_LD2U, |
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TILEGX_OPC_LD2U_ADD, |
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TILEGX_OPC_LD4S, |
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TILEGX_OPC_LD4S_ADD, |
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TILEGX_OPC_LD4U, |
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TILEGX_OPC_LD4U_ADD, |
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TILEGX_OPC_LD_ADD, |
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TILEGX_OPC_LDNA, |
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TILEGX_OPC_LDNA_ADD, |
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TILEGX_OPC_LDNT, |
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TILEGX_OPC_LDNT1S, |
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TILEGX_OPC_LDNT1S_ADD, |
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TILEGX_OPC_LDNT1U, |
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TILEGX_OPC_LDNT1U_ADD, |
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TILEGX_OPC_LDNT2S, |
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TILEGX_OPC_LDNT2S_ADD, |
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TILEGX_OPC_LDNT2U, |
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TILEGX_OPC_LDNT2U_ADD, |
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TILEGX_OPC_LDNT4S, |
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TILEGX_OPC_LDNT4S_ADD, |
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TILEGX_OPC_LDNT4U, |
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TILEGX_OPC_LDNT4U_ADD, |
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TILEGX_OPC_LDNT_ADD, |
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TILEGX_OPC_LNK, |
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TILEGX_OPC_MF, |
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TILEGX_OPC_MFSPR, |
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TILEGX_OPC_MM, |
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TILEGX_OPC_MNZ, |
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TILEGX_OPC_MTSPR, |
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TILEGX_OPC_MUL_HS_HS, |
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TILEGX_OPC_MUL_HS_HU, |
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TILEGX_OPC_MUL_HS_LS, |
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TILEGX_OPC_MUL_HS_LU, |
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TILEGX_OPC_MUL_HU_HU, |
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TILEGX_OPC_MUL_HU_LS, |
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TILEGX_OPC_MUL_HU_LU, |
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TILEGX_OPC_MUL_LS_LS, |
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TILEGX_OPC_MUL_LS_LU, |
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TILEGX_OPC_MUL_LU_LU, |
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TILEGX_OPC_MULA_HS_HS, |
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TILEGX_OPC_MULA_HS_HU, |
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TILEGX_OPC_MULA_HS_LS, |
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TILEGX_OPC_MULA_HS_LU, |
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TILEGX_OPC_MULA_HU_HU, |
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TILEGX_OPC_MULA_HU_LS, |
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TILEGX_OPC_MULA_HU_LU, |
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TILEGX_OPC_MULA_LS_LS, |
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TILEGX_OPC_MULA_LS_LU, |
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TILEGX_OPC_MULA_LU_LU, |
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TILEGX_OPC_MULAX, |
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TILEGX_OPC_MULX, |
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TILEGX_OPC_MZ, |
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TILEGX_OPC_NAP, |
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TILEGX_OPC_NOP, |
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TILEGX_OPC_NOR, |
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TILEGX_OPC_OR, |
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TILEGX_OPC_ORI, |
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TILEGX_OPC_PCNT, |
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TILEGX_OPC_REVBITS, |
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TILEGX_OPC_REVBYTES, |
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TILEGX_OPC_ROTL, |
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TILEGX_OPC_ROTLI, |
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TILEGX_OPC_SHL, |
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TILEGX_OPC_SHL16INSLI, |
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TILEGX_OPC_SHL1ADD, |
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TILEGX_OPC_SHL1ADDX, |
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TILEGX_OPC_SHL2ADD, |
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TILEGX_OPC_SHL2ADDX, |
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TILEGX_OPC_SHL3ADD, |
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TILEGX_OPC_SHL3ADDX, |
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TILEGX_OPC_SHLI, |
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TILEGX_OPC_SHLX, |
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TILEGX_OPC_SHLXI, |
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TILEGX_OPC_SHRS, |
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TILEGX_OPC_SHRSI, |
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TILEGX_OPC_SHRU, |
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TILEGX_OPC_SHRUI, |
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TILEGX_OPC_SHRUX, |
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TILEGX_OPC_SHRUXI, |
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TILEGX_OPC_SHUFFLEBYTES, |
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TILEGX_OPC_ST, |
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TILEGX_OPC_ST1, |
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TILEGX_OPC_ST1_ADD, |
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TILEGX_OPC_ST2, |
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TILEGX_OPC_ST2_ADD, |
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TILEGX_OPC_ST4, |
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TILEGX_OPC_ST4_ADD, |
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TILEGX_OPC_ST_ADD, |
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TILEGX_OPC_STNT, |
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TILEGX_OPC_STNT1, |
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TILEGX_OPC_STNT1_ADD, |
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TILEGX_OPC_STNT2, |
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TILEGX_OPC_STNT2_ADD, |
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TILEGX_OPC_STNT4, |
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TILEGX_OPC_STNT4_ADD, |
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TILEGX_OPC_STNT_ADD, |
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TILEGX_OPC_SUB, |
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TILEGX_OPC_SUBX, |
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TILEGX_OPC_SUBXSC, |
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TILEGX_OPC_SWINT0, |
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TILEGX_OPC_SWINT1, |
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TILEGX_OPC_SWINT2, |
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TILEGX_OPC_SWINT3, |
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TILEGX_OPC_TBLIDXB0, |
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TILEGX_OPC_TBLIDXB1, |
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TILEGX_OPC_TBLIDXB2, |
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TILEGX_OPC_TBLIDXB3, |
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TILEGX_OPC_V1ADD, |
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TILEGX_OPC_V1ADDI, |
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TILEGX_OPC_V1ADDUC, |
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TILEGX_OPC_V1ADIFFU, |
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TILEGX_OPC_V1AVGU, |
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TILEGX_OPC_V1CMPEQ, |
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TILEGX_OPC_V1CMPEQI, |
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TILEGX_OPC_V1CMPLES, |
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TILEGX_OPC_V1CMPLEU, |
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TILEGX_OPC_V1CMPLTS, |
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TILEGX_OPC_V1CMPLTSI, |
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TILEGX_OPC_V1CMPLTU, |
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TILEGX_OPC_V1CMPLTUI, |
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TILEGX_OPC_V1CMPNE, |
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TILEGX_OPC_V1DDOTPU, |
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TILEGX_OPC_V1DDOTPUA, |
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TILEGX_OPC_V1DDOTPUS, |
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TILEGX_OPC_V1DDOTPUSA, |
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TILEGX_OPC_V1DOTP, |
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TILEGX_OPC_V1DOTPA, |
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TILEGX_OPC_V1DOTPU, |
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TILEGX_OPC_V1DOTPUA, |
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TILEGX_OPC_V1DOTPUS, |
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TILEGX_OPC_V1DOTPUSA, |
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TILEGX_OPC_V1INT_H, |
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TILEGX_OPC_V1INT_L, |
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TILEGX_OPC_V1MAXU, |
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TILEGX_OPC_V1MAXUI, |
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TILEGX_OPC_V1MINU, |
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TILEGX_OPC_V1MINUI, |
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TILEGX_OPC_V1MNZ, |
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TILEGX_OPC_V1MULTU, |
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TILEGX_OPC_V1MULU, |
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TILEGX_OPC_V1MULUS, |
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TILEGX_OPC_V1MZ, |
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TILEGX_OPC_V1SADAU, |
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TILEGX_OPC_V1SADU, |
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TILEGX_OPC_V1SHL, |
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TILEGX_OPC_V1SHLI, |
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TILEGX_OPC_V1SHRS, |
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TILEGX_OPC_V1SHRSI, |
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TILEGX_OPC_V1SHRU, |
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TILEGX_OPC_V1SHRUI, |
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TILEGX_OPC_V1SUB, |
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TILEGX_OPC_V1SUBUC, |
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TILEGX_OPC_V2ADD, |
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TILEGX_OPC_V2ADDI, |
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TILEGX_OPC_V2ADDSC, |
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TILEGX_OPC_V2ADIFFS, |
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TILEGX_OPC_V2AVGS, |
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TILEGX_OPC_V2CMPEQ, |
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TILEGX_OPC_V2CMPEQI, |
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TILEGX_OPC_V2CMPLES, |
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TILEGX_OPC_V2CMPLEU, |
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TILEGX_OPC_V2CMPLTS, |
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TILEGX_OPC_V2CMPLTSI, |
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TILEGX_OPC_V2CMPLTU, |
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TILEGX_OPC_V2CMPLTUI, |
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TILEGX_OPC_V2CMPNE, |
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TILEGX_OPC_V2DOTP, |
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TILEGX_OPC_V2DOTPA, |
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TILEGX_OPC_V2INT_H, |
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TILEGX_OPC_V2INT_L, |
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TILEGX_OPC_V2MAXS, |
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TILEGX_OPC_V2MAXSI, |
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TILEGX_OPC_V2MINS, |
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TILEGX_OPC_V2MINSI, |
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TILEGX_OPC_V2MNZ, |
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TILEGX_OPC_V2MULFSC, |
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TILEGX_OPC_V2MULS, |
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TILEGX_OPC_V2MULTS, |
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TILEGX_OPC_V2MZ, |
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TILEGX_OPC_V2PACKH, |
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TILEGX_OPC_V2PACKL, |
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TILEGX_OPC_V2PACKUC, |
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TILEGX_OPC_V2SADAS, |
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TILEGX_OPC_V2SADAU, |
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TILEGX_OPC_V2SADS, |
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TILEGX_OPC_V2SADU, |
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TILEGX_OPC_V2SHL, |
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TILEGX_OPC_V2SHLI, |
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TILEGX_OPC_V2SHLSC, |
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TILEGX_OPC_V2SHRS, |
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TILEGX_OPC_V2SHRSI, |
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TILEGX_OPC_V2SHRU, |
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TILEGX_OPC_V2SHRUI, |
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TILEGX_OPC_V2SUB, |
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TILEGX_OPC_V2SUBSC, |
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TILEGX_OPC_V4ADD, |
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TILEGX_OPC_V4ADDSC, |
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TILEGX_OPC_V4INT_H, |
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TILEGX_OPC_V4INT_L, |
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TILEGX_OPC_V4PACKSC, |
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TILEGX_OPC_V4SHL, |
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TILEGX_OPC_V4SHLSC, |
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TILEGX_OPC_V4SHRS, |
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TILEGX_OPC_V4SHRU, |
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TILEGX_OPC_V4SUB, |
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TILEGX_OPC_V4SUBSC, |
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TILEGX_OPC_WH64, |
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TILEGX_OPC_XOR, |
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TILEGX_OPC_XORI, |
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TILEGX_OPC_NONE |
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} tilegx_mnemonic; |
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/* 64-bit pattern for a { bpt ; nop } bundle. */ |
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#define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL |
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static __inline unsigned int |
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get_BFEnd_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 12)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_BFOpcodeExtension_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 24)) & 0xf); |
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} |
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static __inline unsigned int |
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get_BFStart_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 18)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_BrOff_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 31)) & 0x0000003f) | |
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(((unsigned int)(n >> 37)) & 0x0001ffc0); |
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} |
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static __inline unsigned int |
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get_BrType_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 54)) & 0x1f); |
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} |
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static __inline unsigned int |
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get_Dest_Imm8_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 31)) & 0x0000003f) | |
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(((unsigned int)(n >> 43)) & 0x000000c0); |
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} |
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static __inline unsigned int |
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get_Dest_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 0)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_Dest_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 31)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_Dest_Y0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 0)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_Dest_Y1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 31)) & 0x3f); |
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} |
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static __inline unsigned int |
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get_Imm16_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 12)) & 0xffff); |
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} |
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static __inline unsigned int |
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get_Imm16_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 43)) & 0xffff); |
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} |
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static __inline unsigned int |
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get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((n >> 20)) & 0xff); |
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} |
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static __inline unsigned int |
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get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) |
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{ |
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return (((unsigned int)(n >> 51)) & 0xff); |
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} |
|
|
|
static __inline unsigned int |
|
get_Imm8_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0xff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Imm8_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0xff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Imm8_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0xff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Imm8_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0xff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_JumpOff_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 31)) & 0x7ffffff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 58)) & 0x1); |
|
} |
|
|
|
static __inline unsigned int |
|
get_MF_Imm14_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 37)) & 0x3fff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_MT_Imm14_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 31)) & 0x0000003f) | |
|
(((unsigned int)(n >> 37)) & 0x00003fc0); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Mode(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 62)) & 0x3); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Opcode_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 28)) & 0x7); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Opcode_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 59)) & 0x7); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Opcode_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 27)) & 0xf); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Opcode_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 58)) & 0xf); |
|
} |
|
|
|
static __inline unsigned int |
|
get_Opcode_Y2(tilegx_bundle_bits n) |
|
{ |
|
return (((n >> 26)) & 0x00000001) | |
|
(((unsigned int)(n >> 56)) & 0x00000002); |
|
} |
|
|
|
static __inline unsigned int |
|
get_RRROpcodeExtension_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 18)) & 0x3ff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_RRROpcodeExtension_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 49)) & 0x3ff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 18)) & 0x3); |
|
} |
|
|
|
static __inline unsigned int |
|
get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 49)) & 0x3); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShAmt_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShAmt_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShAmt_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShAmt_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 18)) & 0x3ff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 49)) & 0x3ff); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 18)) & 0x3); |
|
} |
|
|
|
static __inline unsigned int |
|
get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 49)) & 0x3); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcA_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 6)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcA_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 37)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcA_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 6)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcA_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 37)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcA_Y2(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 20)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcBDest_Y2(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 51)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcB_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcB_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcB_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_SrcB_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((n >> 12)) & 0x3f); |
|
} |
|
|
|
static __inline unsigned int |
|
get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) |
|
{ |
|
return (((unsigned int)(n >> 43)) & 0x3f); |
|
} |
|
|
|
|
|
static __inline int |
|
sign_extend(int n, int num_bits) |
|
{ |
|
int shift = (int)(sizeof(int) * 8 - num_bits); |
|
return (n << shift) >> shift; |
|
} |
|
|
|
|
|
|
|
static __inline tilegx_bundle_bits |
|
create_BFEnd_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_BFOpcodeExtension_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xf) << 24); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_BFStart_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 18); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_BrOff_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
|
(((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_BrType_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x1f)) << 54); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Dest_Imm8_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
|
(((tilegx_bundle_bits)(n & 0x000000c0)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Dest_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 0); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Dest_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Dest_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 0); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Dest_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 31); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm16_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xffff) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm16_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0xffff)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8OpcodeExtension_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xff) << 20); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8OpcodeExtension_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0xff)) << 51); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xff) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xff) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Imm8_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0xff)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_JumpOff_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_JumpOpcodeExtension_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x1)) << 58); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_MF_Imm14_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_MT_Imm14_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | |
|
(((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Mode(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3)) << 62); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Opcode_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x7) << 28); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Opcode_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x7)) << 59); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Opcode_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0xf) << 27); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Opcode_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0xf)) << 58); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_Opcode_Y2(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x00000001) << 26) | |
|
(((tilegx_bundle_bits)(n & 0x00000002)) << 56); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_RRROpcodeExtension_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3ff) << 18); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_RRROpcodeExtension_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_RRROpcodeExtension_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3) << 18); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_RRROpcodeExtension_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShAmt_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShAmt_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShAmt_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShAmt_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShiftOpcodeExtension_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3ff) << 18); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShiftOpcodeExtension_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShiftOpcodeExtension_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3) << 18); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_ShiftOpcodeExtension_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3)) << 49); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcA_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 6); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcA_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcA_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 6); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcA_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 37); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcA_Y2(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 20); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcBDest_Y2(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 51); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcB_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcB_X1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcB_Y0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_SrcB_Y1(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
|
return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
|
} |
|
|
|
static __inline tilegx_bundle_bits |
|
create_UnaryOpcodeExtension_X0(int num) |
|
{ |
|
const unsigned int n = (unsigned int)num; |
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return ((n & 0x3f) << 12); |
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} |
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|
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static __inline tilegx_bundle_bits |
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create_UnaryOpcodeExtension_X1(int num) |
|
{ |
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const unsigned int n = (unsigned int)num; |
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return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
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} |
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|
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static __inline tilegx_bundle_bits |
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create_UnaryOpcodeExtension_Y0(int num) |
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{ |
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const unsigned int n = (unsigned int)num; |
|
return ((n & 0x3f) << 12); |
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} |
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|
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static __inline tilegx_bundle_bits |
|
create_UnaryOpcodeExtension_Y1(int num) |
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{ |
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const unsigned int n = (unsigned int)num; |
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return (((tilegx_bundle_bits)(n & 0x3f)) << 43); |
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} |
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|
|
|
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typedef enum |
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{ |
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TILEGX_PIPELINE_X0, |
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TILEGX_PIPELINE_X1, |
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TILEGX_PIPELINE_Y0, |
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TILEGX_PIPELINE_Y1, |
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TILEGX_PIPELINE_Y2, |
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} tilegx_pipeline; |
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|
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#define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) |
|
|
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typedef enum |
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{ |
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TILEGX_OP_TYPE_REGISTER, |
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TILEGX_OP_TYPE_IMMEDIATE, |
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TILEGX_OP_TYPE_ADDRESS, |
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TILEGX_OP_TYPE_SPR |
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} tilegx_operand_type; |
|
|
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/* These are the bits that determine if a bundle is in the X encoding. */ |
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#define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) |
|
|
|
enum |
|
{ |
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/* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ |
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TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, |
|
|
|
/* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ |
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TILEGX_NUM_PIPELINE_ENCODINGS = 5, |
|
|
|
/* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ |
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TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, |
|
|
|
/* Instructions take this many bytes. */ |
|
TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, |
|
|
|
/* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ |
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TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, |
|
|
|
/* Bundles should be aligned modulo this number of bytes. */ |
|
TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = |
|
(1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), |
|
|
|
/* Number of registers (some are magic, such as network I/O). */ |
|
TILEGX_NUM_REGISTERS = 64, |
|
}; |
|
|
|
|
|
struct tilegx_operand |
|
{ |
|
/* Is this operand a register, immediate or address? */ |
|
tilegx_operand_type type; |
|
|
|
/* The default relocation type for this operand. */ |
|
signed int default_reloc : 16; |
|
|
|
/* How many bits is this value? (used for range checking) */ |
|
unsigned int num_bits : 5; |
|
|
|
/* Is the value signed? (used for range checking) */ |
|
unsigned int is_signed : 1; |
|
|
|
/* Is this operand a source register? */ |
|
unsigned int is_src_reg : 1; |
|
|
|
/* Is this operand written? (i.e. is it a destination register) */ |
|
unsigned int is_dest_reg : 1; |
|
|
|
/* Is this operand PC-relative? */ |
|
unsigned int is_pc_relative : 1; |
|
|
|
/* By how many bits do we right shift the value before inserting? */ |
|
unsigned int rightshift : 2; |
|
|
|
/* Return the bits for this operand to be ORed into an existing bundle. */ |
|
tilegx_bundle_bits (*insert) (int op); |
|
|
|
/* Extract this operand and return it. */ |
|
unsigned int (*extract) (tilegx_bundle_bits bundle); |
|
}; |
|
|
|
|
|
extern const struct tilegx_operand tilegx_operands[]; |
|
|
|
/* One finite-state machine per pipe for rapid instruction decoding. */ |
|
extern const unsigned short * const |
|
tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; |
|
|
|
|
|
struct tilegx_opcode |
|
{ |
|
/* The opcode mnemonic, e.g. "add" */ |
|
const char *name; |
|
|
|
/* The enum value for this mnemonic. */ |
|
tilegx_mnemonic mnemonic; |
|
|
|
/* A bit mask of which of the five pipes this instruction |
|
is compatible with: |
|
X0 0x01 |
|
X1 0x02 |
|
Y0 0x04 |
|
Y1 0x08 |
|
Y2 0x10 */ |
|
unsigned char pipes; |
|
|
|
/* How many operands are there? */ |
|
unsigned char num_operands; |
|
|
|
/* Which register does this write implicitly, or TREG_ZERO if none? */ |
|
unsigned char implicitly_written_register; |
|
|
|
/* Can this be bundled with other instructions (almost always true). */ |
|
unsigned char can_bundle; |
|
|
|
/* The description of the operands. Each of these is an |
|
* index into the tilegx_operands[] table. */ |
|
unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; |
|
|
|
#if !defined(__KERNEL__) && !defined(_LIBC) |
|
/* A mask of which bits have predefined values for each pipeline. |
|
* This is useful for disassembly. */ |
|
tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; |
|
|
|
/* For each bit set in fixed_bit_masks, what the value is for this |
|
* instruction. */ |
|
tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; |
|
#endif |
|
}; |
|
|
|
extern const struct tilegx_opcode tilegx_opcodes[]; |
|
|
|
/* Used for non-textual disassembly into structs. */ |
|
struct tilegx_decoded_instruction |
|
{ |
|
const struct tilegx_opcode *opcode; |
|
const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; |
|
long long operand_values[TILEGX_MAX_OPERANDS]; |
|
}; |
|
|
|
|
|
/* Disassemble a bundle into a struct for machine processing. */ |
|
extern int parse_insn_tilegx(tilegx_bundle_bits bits, |
|
unsigned long long pc, |
|
struct tilegx_decoded_instruction |
|
decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); |
|
|
|
|
|
#if !defined(__KERNEL__) && !defined(_LIBC) |
|
/* Canonical names of all the registers. */ |
|
/* ISSUE: This table lives in "tile-dis.c" */ |
|
extern const char * const tilegx_register_names[]; |
|
|
|
/* Descriptor for a special-purpose register. */ |
|
struct tilegx_spr |
|
{ |
|
/* The number */ |
|
int number; |
|
|
|
/* The name */ |
|
const char *name; |
|
}; |
|
|
|
/* List of all the SPRs; ordered by increasing number. */ |
|
extern const struct tilegx_spr tilegx_sprs[]; |
|
|
|
/* Number of special-purpose registers. */ |
|
extern const int tilegx_num_sprs; |
|
|
|
extern const char * |
|
get_tilegx_spr_name (int num); |
|
#endif /* !__KERNEL__ && !_LIBC */ |
|
|
|
/* Make a few "tile_" variables to simply common code between |
|
architectures. */ |
|
|
|
typedef tilegx_bundle_bits tile_bundle_bits; |
|
#define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES |
|
#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES |
|
#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ |
|
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES |
|
|
|
#endif /* opcode_tilegx_h */
|
|
|