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166 lines
4.5 KiB
166 lines
4.5 KiB
/* |
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* Copyright 2012 The Android Open Source Project |
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* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
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* Not a Contribution. |
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* |
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* Licensed under the Apache License, Version 2.0 (the "License"); |
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* you may not use this file except in compliance with the License. |
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* You may obtain a copy of the License at |
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* |
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* http://www.apache.org/licenses/LICENSE-2.0 |
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* |
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* Unless required by applicable law or agreed to in writing, software |
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* distributed under the License is distributed on an "AS IS" BASIS, |
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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* See the License for the specific language governing permissions and |
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* limitations under the License. |
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*/ |
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#ifndef HW_AR3K_H |
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#define HW_AR3K_H |
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#include <sys/socket.h> |
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/****************************************************************************** |
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** Constants & Macros |
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******************************************************************************/ |
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#define MAX_CNT_RETRY 100 |
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#define HCI_MAX_CMD_SIZE 260 |
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#define HCI_MAX_EVENT_SIZE 260 |
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#define HCI_CHG_BAUD_CMD_OCF 0x0C |
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#define HCI_VENDOR_CMD_OGF 0x3F |
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#define WRITE_BDADDR_CMD_LEN 14 |
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#define WRITE_BAUD_CMD_LEN 6 |
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#define MAX_CMD_LEN WRITE_BDADDR_CMD_LEN |
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#define GET_VERSION_OCF 0x1E |
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/* Byte order conversions */ |
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#if __BYTE_ORDER == __LITTLE_ENDIAN |
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#define htobs(d) (d) |
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#define htobl(d) (d) |
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#define btohs(d) (d) |
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#define btohl(d) (d) |
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#elif __BYTE_ORDER == __BIG_ENDIAN |
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#define htobs(d) bswap_16(d) |
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#define htobl(d) bswap_32(d) |
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#define btohs(d) bswap_16(d) |
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#define btohl(d) bswap_32(d) |
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#else |
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#error "Unknown byte order" |
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#endif |
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#define FW_PATH "/system/etc/firmware/ar3k/" |
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#define STREAM_TO_UINT16(u16, p) \ |
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{u16 = ((uint16_t)(*(p)) + (((uint16_t)(*((p) + 1))) << 8)); (p) += 2;} |
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#define UINT16_TO_STREAM(p, u16) \ |
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{*(p)++ = (uint8_t)(u16); *(p)++ = (uint8_t)((u16) >> 8);} |
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#define UINT32_TO_STREAM(p, u32) \ |
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{*(p)++ = (uint8_t)(u32); *(p)++ = (uint8_t)((u32) >> 8);\ |
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*(p)++ = (uint8_t)((u32) >> 16); *(p)++ = (uint8_t)((u32) >> 24);} |
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#define MAX_TAGS 50 |
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#define PS_HDR_LEN 4 |
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#define HCI_VENDOR_CMD_OGF 0x3F |
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#define HCI_PS_CMD_OCF 0x0B |
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#define VERIFY_CRC 9 |
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#define PS_REGION 1 |
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#define PATCH_REGION 2 |
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#define BDADDR_FILE "ar3kbdaddr.pst" |
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#define MAX_PATCH_CMD 244 |
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struct patch_entry { |
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int16_t len; |
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uint8_t data[MAX_PATCH_CMD]; |
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}; |
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#define HCI_UART_RAW_DEVICE 0 |
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#define HCI_COMMAND_HDR_SIZE 3 |
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#define PS_WRITE 1 |
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#define PS_RESET 2 |
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#define WRITE_PATCH 8 |
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#define ENABLE_PATCH 11 |
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#define HCI_PS_CMD_HDR_LEN 7 |
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#define HCI_CMD_MAX_LEN 258 |
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#define PS_RESET_PARAM_LEN 6 |
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#define PS_RESET_CMD_LEN (HCI_PS_CMD_HDR_LEN + PS_RESET_PARAM_LEN) |
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#define PS_ID_MASK 0xFF |
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#define LOCAL_NAME_BUFFER_LEN 32 |
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#define DEV_REGISTER 0x4FFC |
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#define GET_DEV_TYPE_OCF 0x05 |
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#define HCIDEVUP _IOW('H', 201, int) |
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#define OGF_VENDOR_CMD 0x3f |
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#define EVT_CMD_COMPLETE_SIZE 3 |
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#define EVT_CMD_STATUS 0x0F |
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#define EVT_CMD_STATUS_SIZE 4 |
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#define HCI_COMMAND_HDR_SIZE 3 |
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#define HCI_EVENT_HDR_SIZE 2 |
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#define HCI_EV_SUCCESS 0x00 |
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/* HCI Socket options */ |
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#define HCI_DATA_DIR 1 |
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#define HCI_FILTER 2 |
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#define HCI_TIME_STAMP 3 |
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/* HCI CMSG flags */ |
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#define HCI_CMSG_DIR 0x0001 |
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#define HCI_CMSG_TSTAMP 0x0002 |
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#ifndef VENDOR_LPM_PROC_NODE |
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#define VENDOR_LPM_PROC_NODE "/sys/module/hci_uart/parameters/ath_lpm" |
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#endif |
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/* proc fs node for notifying write request */ |
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#ifndef VENDOR_BTWRITE_PROC_NODE |
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#define VENDOR_BTWRITE_PROC_NODE "/sys/module/hci_uart/parameters/ath_btwrite" |
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#endif |
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/****************************************************************************** |
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** Local type definitions |
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******************************************************************************/ |
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typedef struct { |
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uint8_t b[6]; |
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} __attribute__((packed)) bdaddr_t; |
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struct sockaddr_hci { |
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sa_family_t hci_family; |
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unsigned short hci_dev; |
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unsigned short hci_channel; |
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}; |
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struct tag_info { |
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unsigned section; |
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unsigned line_count; |
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unsigned char_cnt; |
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unsigned byte_count; |
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}; |
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struct ps_cfg_entry { |
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uint32_t id; |
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uint32_t len; |
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uint8_t *data; |
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}; |
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struct ps_entry_type { |
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unsigned char type; |
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unsigned char array; |
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}; |
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struct uart_t { |
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char *type; |
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int m_id; |
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int p_id; |
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int proto; |
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int init_speed; |
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int speed; |
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int flags; |
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int pm; |
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char *bdaddr; |
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int (*init) (int fd, struct uart_t *u, struct termios *ti); |
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int (*post) (int fd, struct uart_t *u, struct termios *ti); |
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}; |
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#endif /* HW_AR3K_H */
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