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141 lines
2.9 KiB
141 lines
2.9 KiB
/* |
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* Copyright (C) 2016 The Android Open Source Project |
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* |
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* Licensed under the Apache License, Version 2.0 (the "License"); |
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* you may not use this file except in compliance with the License. |
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* You may obtain a copy of the License at |
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* |
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* http://www.apache.org/licenses/LICENSE-2.0 |
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* |
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* Unless required by applicable law or agreed to in writing, software |
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* distributed under the License is distributed on an "AS IS" BASIS, |
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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* See the License for the specific language governing permissions and |
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* limitations under the License. |
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*/ |
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#ifndef _LIBUNWINDSTACK_MACHINE_H |
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#define _LIBUNWINDSTACK_MACHINE_H |
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#include <stdint.h> |
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namespace unwindstack { |
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enum ArmReg : uint16_t { |
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ARM_REG_R0 = 0, |
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ARM_REG_R1, |
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ARM_REG_R2, |
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ARM_REG_R3, |
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ARM_REG_R4, |
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ARM_REG_R5, |
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ARM_REG_R6, |
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ARM_REG_R7, |
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ARM_REG_R8, |
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ARM_REG_R9, |
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ARM_REG_R10, |
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ARM_REG_R11, |
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ARM_REG_R12, |
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ARM_REG_R13, |
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ARM_REG_R14, |
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ARM_REG_R15, |
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ARM_REG_LAST, |
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ARM_REG_SP = ARM_REG_R13, |
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ARM_REG_LR = ARM_REG_R14, |
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ARM_REG_PC = ARM_REG_R15, |
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}; |
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enum Arm64Reg : uint16_t { |
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ARM64_REG_R0 = 0, |
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ARM64_REG_R1, |
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ARM64_REG_R2, |
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ARM64_REG_R3, |
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ARM64_REG_R4, |
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ARM64_REG_R5, |
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ARM64_REG_R6, |
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ARM64_REG_R7, |
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ARM64_REG_R8, |
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ARM64_REG_R9, |
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ARM64_REG_R10, |
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ARM64_REG_R11, |
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ARM64_REG_R12, |
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ARM64_REG_R13, |
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ARM64_REG_R14, |
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ARM64_REG_R15, |
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ARM64_REG_R16, |
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ARM64_REG_R17, |
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ARM64_REG_R18, |
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ARM64_REG_R19, |
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ARM64_REG_R20, |
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ARM64_REG_R21, |
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ARM64_REG_R22, |
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ARM64_REG_R23, |
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ARM64_REG_R24, |
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ARM64_REG_R25, |
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ARM64_REG_R26, |
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ARM64_REG_R27, |
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ARM64_REG_R28, |
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ARM64_REG_R29, |
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ARM64_REG_R30, |
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ARM64_REG_R31, |
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ARM64_REG_PC, |
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ARM64_REG_LAST, |
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ARM64_REG_SP = ARM64_REG_R31, |
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ARM64_REG_LR = ARM64_REG_R30, |
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}; |
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// Matches the numbers for the registers as generated by compilers. |
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// If this is changed, then unwinding will fail. |
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enum X86Reg : uint16_t { |
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X86_REG_EAX = 0, |
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X86_REG_ECX = 1, |
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X86_REG_EDX = 2, |
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X86_REG_EBX = 3, |
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X86_REG_ESP = 4, |
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X86_REG_EBP = 5, |
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X86_REG_ESI = 6, |
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X86_REG_EDI = 7, |
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X86_REG_EIP = 8, |
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X86_REG_EFL = 9, |
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X86_REG_CS = 10, |
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X86_REG_SS = 11, |
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X86_REG_DS = 12, |
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X86_REG_ES = 13, |
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X86_REG_FS = 14, |
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X86_REG_GS = 15, |
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X86_REG_LAST, |
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X86_REG_SP = X86_REG_ESP, |
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X86_REG_PC = X86_REG_EIP, |
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}; |
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// Matches the numbers for the registers as generated by compilers. |
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// If this is changed, then unwinding will fail. |
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enum X86_64Reg : uint16_t { |
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X86_64_REG_RAX = 0, |
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X86_64_REG_RDX = 1, |
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X86_64_REG_RCX = 2, |
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X86_64_REG_RBX = 3, |
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X86_64_REG_RSI = 4, |
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X86_64_REG_RDI = 5, |
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X86_64_REG_RBP = 6, |
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X86_64_REG_RSP = 7, |
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X86_64_REG_R8 = 8, |
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X86_64_REG_R9 = 9, |
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X86_64_REG_R10 = 10, |
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X86_64_REG_R11 = 11, |
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X86_64_REG_R12 = 12, |
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X86_64_REG_R13 = 13, |
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X86_64_REG_R14 = 14, |
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X86_64_REG_R15 = 15, |
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X86_64_REG_RIP = 16, |
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X86_64_REG_LAST, |
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X86_64_REG_SP = X86_64_REG_RSP, |
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X86_64_REG_PC = X86_64_REG_RIP, |
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}; |
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} // namespace unwindstack |
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#endif // _LIBUNWINDSTACK_MACHINE_H
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